6 comments:
File src/mainboard/asus/h110m-e_m2/Makefile.inc:
Patch Set #69, Line 17: subdirs-y += spd
Garbage!
(it is only necessary when using memory-down)
removed.
File src/mainboard/asus/h110m-e_m2/devicetree.cb:
# VR Settings Configuration for 5 Domains
#+----------------+-------+-------+-------------+-------------+-------+
#| Domain/Setting | SA | IA | Ring Sliced | GT Unsliced | GT |
#+----------------+-------+-------+-------------+-------------+-------+
#| Psi1Threshold | 20A | 20A | 20A | 20A | 20A |
#| Psi2Threshold | 4A | 5A | 5A | 5A | 5A |
#| Psi3Threshold | 1A | 1A | 1A | 1A | 1A |
#| Psi3Enable | 1 | 1 | 1 | 1 | 1 |
#| Psi4Enable | 1 | 1 | 1 | 1 | 1 |
#| ImonSlope | 0 | 0 | 0 | 0 | 0 |
#| ImonOffset | 0 | 0 | 0 | 0 | 0 |
#| IccMax* | 0 | 0 | 0 | 0 | 0 |
#| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | 1.52V |
#+----------------+-------+-------+-------------+-------------+-------+
#[*] Installed automatically for KBL-S and KBL-DT CPUs in the vr_config.c
#+----------------+-------+-------+-------------+-------------+-------+
register "domain_vr_config[VR_SYSTEM_AGENT]" = "{
.vr_config_enable = 1, \
.psi1threshold = VR_CFG_AMP(20), \
.psi2threshold = VR_CFG_AMP(4), \
.psi3threshold = VR_CFG_AMP(1), \
.psi3enable = 1, \
.psi4enable = 1, \
.imon_slope = 0x0, \
.imon_offset = 0x0, \
.icc_max = 0x0, \
.voltage_limit = 1520 \
}"
register "domain_vr_config[VR_IA_CORE]" = "{
.vr_config_enable = 1, \
.psi1threshold = VR_CFG_AMP(20), \
.psi2threshold = VR_CFG_AMP(5), \
.psi3threshold = VR_CFG_AMP(1), \
.psi3enable = 1, \
.psi4enable = 1, \
.imon_slope = 0x0, \
.imon_offset = 0x0, \
.icc_max = 0x0, \
.voltage_limit = 1520 \
}"
register "domain_vr_config[VR_GT_UNSLICED]" = "{
.vr_config_enable = 1, \
.psi1threshold = VR_CFG_AMP(20), \
.psi2threshold = VR_CFG_AMP(5), \
.psi3threshold = VR_CFG_AMP(1), \
.psi3enable = 1, \
.psi4enable = 1, \
.imon_slope = 0x0, \
.imon_offset = 0x0, \
.icc_max = 0x0 ,\
.voltage_limit = 1520 \
}"
register "domain_vr_config[VR_GT_SLICED]" = "{
.vr_config_enable = 1, \
.psi1threshold = VR_CFG_AMP(20), \
.psi2threshold = VR_CFG_AMP(5), \
.psi3threshold = VR_CFG_AMP(1), \
.psi3enable = 1, \
.psi4enable = 1, \
.imon_slope = 0x0, \
.imon_offset = 0x0, \
.icc_max = 0x0, \
.voltage_limit = 1520 \
}"
that's all default, right? then this can be dropped completely
Done
device pci 00.0 on end # Host Bridge
device pci 01.0 on end # PEG
device pci 02.0 on end # Integrated Graphics Device
device pci 14.0 on end # USB xHCI
device pci 14.1 off end # USB xDCI (OTG)
device pci 14.2 on end # Thermal Subsystem
device pci 15.0 off end # I2C #0
device pci 15.1 off end # I2C #1
device pci 15.2 off end # I2C #2
device pci 15.3 off end # I2C #3
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT Redirection
device pci 16.4 off end # Management Engine Interface 3
device pci 17.0 on end # SATA
device pci 19.0 off end # UART #2
device pci 19.1 off end # I2C #5
device pci 19.2 off end # I2C #4
device pci 1c.0 on end # PCI Express Port 1
device pci 1c.1 off end # PCI Express Port 2
device pci 1c.2 off end # PCI Express Port 3
device pci 1c.3 off end # PCI Express Port 4
device pci 1c.4 on end # PCI Express Port 5
device pci 1c.5 off end # PCI Express Port 6
device pci 1c.6 off end # PCI Express Port 7
device pci 1c.7 on end # PCI Express Port 8
device pci 1d.0 on end # PCI Express Port 9
device pci 1d.1 off end # PCI Express Port 10
device pci 1d.2 off end # PCI Express Port 11
device pci 1d.3 off end # PCI Express Port 12
device pci 1e.0 off end # UART #0
device pci 1e.1 off end # UART #1
device pci 1e.2 off end # GSPI #0
device pci 1e.3 off end # GSPI #1
device pci 1e.4 off end # eMMC
device pci 1e.5 off end # SDIO
device pci 1e.6 off end # SDCard
device pci 1f.0 on # LPC bridge
What he means: Use tabs to align these things. […]
Done
evice pnp 2e.6 off end # CIR
device pnp 2e.7 off end # GPIO7
device pnp 2e.107 off end # GPIO8
device pnp 2e.8 off end # WDT
device pnp 2e.108 off end # GPIO0
device pnp 2e.308 off end # GPIO base
device pnp 2e.408 off end # WDTMEM
device pnp 2e.9 off end # GPIO2
device pnp 2e.109 off end # GPIO3
device pnp 2e.209 off end # GPIO4
device pnp 2e.309 off end # GPIO5
device pnp 2e.a on end # ACPI
device pnp 2e.b off # HWM, LED
(clarification: `322` refers to the line number of this file. […]
Done
File src/mainboard/asus/h110m-e_m2/include/gpio.h:
Patch Set #69, Line 22: #define H110_PAD_DW0_DW1_CFG(val, config0, config1) \
not really needed, just use _PAD_CFG_STRUCT below
Done
Patch Set #69, Line 161: 0x04000100
woops, was just copy pasta, so yes ;-)
Done
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