Karthik Ramasubramanian uploaded patch set #2 to this change.

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soc/intel/apollolake: Reset GPI IS & IE registers at ramstage

Reset GPI Interrupt status and enable registers from ramstage instead of
bootblock so that it applies to devices in field.

BUG=b:130593883
BRANCH=octopus
TEST=Ensure that the Interrupt status & enable registers are reset
during the boot up when the system is brought out of G3, S5 & S3. Ensure
that the system boots fine to ChromeOS.

Change-Id: Ib11b580ceb23bd1fe789f549b667a8ced2d859a1
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
---
M src/soc/intel/apollolake/bootblock/bootblock.c
M src/soc/intel/apollolake/chip.c
2 files changed, 6 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/32534/2

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