Martin Roth submitted this change.
soc/amd/common: Don't init SMIs or SCIs in psp_verstage
We can't set the SMI or SCI flags in psp verstage, so skip them.
TEST=Build
BUG=b:154142138
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I40eb464cde6b233607de1e177702c643ea2b4bb2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42765
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/soc/amd/common/block/gpio_banks/gpio.c
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/soc/amd/common/block/gpio_banks/gpio.c b/src/soc/amd/common/block/gpio_banks/gpio.c
index 726ee1c..b9646b9 100644
--- a/src/soc/amd/common/block/gpio_banks/gpio.c
+++ b/src/soc/amd/common/block/gpio_banks/gpio.c
@@ -183,6 +183,8 @@
const struct soc_amd_event *gev_tbl;
struct sci_trigger_regs sci_trigger_cfg = { 0 };
size_t gev_items;
+ const bool can_set_smi_flags = !(CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) &&
+ ENV_SEPARATE_VERSTAGE);
/*
* Disable blocking wake/interrupt status generation while updating
@@ -196,7 +198,8 @@
*/
master_switch_clr(GPIO_MASK_STS_EN | GPIO_INTERRUPT_EN);
- soc_get_gpio_event_table(&gev_tbl, &gev_items);
+ if (can_set_smi_flags)
+ soc_get_gpio_event_table(&gev_tbl, &gev_items);
for (index = 0; index < size; index++) {
gpio = gpio_list_ptr[index].gpio;
@@ -216,6 +219,10 @@
if (control_flags == 0)
continue;
+ /* Can't set SMI flags from PSP */
+ if (!can_set_smi_flags)
+ continue;
+
gevent_num = get_gpio_gevent(gpio, gev_tbl, gev_items);
if (gevent_num < 0) {
printk(BIOS_WARNING, "Warning: GPIO pin %d has no associated gevent!\n",
@@ -241,7 +248,8 @@
master_switch_set(GPIO_INTERRUPT_EN);
/* Set all SCI trigger polarity (high/low) and level (edge/level). */
- set_sci_trigger(&sci_trigger_cfg);
+ if (can_set_smi_flags)
+ set_sci_trigger(&sci_trigger_cfg);
}
int gpio_interrupt_status(gpio_t gpio)
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