Patrick Georgi submitted this change.
mb/google/volteer: Switch to using auto-generated SPDs
This change switches volteer and family to using auto-generated SPDs
obtained using gen_spd.go and gen_part_id.go.
BUG=b:147321551,b:155423877
Change-Id: I9ed48f0b51714b072a0459d0b70b5417a49db54f
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41618
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
---
M src/mainboard/google/volteer/Makefile.inc
M src/mainboard/google/volteer/spd/Makefile.inc
M src/mainboard/google/volteer/variants/halvor/Makefile.inc
M src/mainboard/google/volteer/variants/malefor/Makefile.inc
M src/mainboard/google/volteer/variants/ripto/Makefile.inc
D src/mainboard/google/volteer/variants/volteer/Makefile.inc
6 files changed, 2 insertions(+), 20 deletions(-)
diff --git a/src/mainboard/google/volteer/Makefile.inc b/src/mainboard/google/volteer/Makefile.inc
index f66c520..c01f993 100644
--- a/src/mainboard/google/volteer/Makefile.inc
+++ b/src/mainboard/google/volteer/Makefile.inc
@@ -20,7 +20,7 @@
VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR))
subdirs-y += variants/$(VARIANT_DIR)
-subdirs-y += variants/$(VARIANT_DIR)/spd
+subdirs-y += variants/$(VARIANT_DIR)/memory
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
subdirs-y += spd
diff --git a/src/mainboard/google/volteer/spd/Makefile.inc b/src/mainboard/google/volteer/spd/Makefile.inc
index 5891b6d..e125994 100644
--- a/src/mainboard/google/volteer/spd/Makefile.inc
+++ b/src/mainboard/google/volteer/spd/Makefile.inc
@@ -4,7 +4,7 @@
ifneq ($(SPD_SOURCES),)
SPD_BIN = $(obj)/spd.bin
-SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/spd/$(f).spd.hex)
+SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/soc/intel/tigerlake/spd/lp4x/$(f))
# Include spd ROM data
$(SPD_BIN): $(SPD_DEPS)
diff --git a/src/mainboard/google/volteer/variants/halvor/Makefile.inc b/src/mainboard/google/volteer/variants/halvor/Makefile.inc
index b1e4c9a..13269db 100644
--- a/src/mainboard/google/volteer/variants/halvor/Makefile.inc
+++ b/src/mainboard/google/volteer/variants/halvor/Makefile.inc
@@ -1,9 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
-## Memory Options # DRAM ID # Part Num
-SPD_SOURCES = SPD_LPDDR4X_556b_1R_32Gb_8GbD_QDP_4267 # b0000 # H9HKNNNCRMBVAR-NEH
-SPD_SOURCES += SPD_LPDDR4X_556b_1R_64Gb_16GbD_QDP_4267 # b0001 # MT53E1G64D4SQ-046 WT:A
-
bootblock-y += gpio.c
ramstage-y += gpio.c
diff --git a/src/mainboard/google/volteer/variants/malefor/Makefile.inc b/src/mainboard/google/volteer/variants/malefor/Makefile.inc
index 44beb90..343c7db 100644
--- a/src/mainboard/google/volteer/variants/malefor/Makefile.inc
+++ b/src/mainboard/google/volteer/variants/malefor/Makefile.inc
@@ -1,8 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
-## Memory Options # DRAM ID # Part Num
-SPD_SOURCES = SPD_LPDDR4X_200b_8bank_1Rx16_16Gb_DDP_4267 # 0b0000 # MT53E512M32D2NP-046
-
romstage-y += memory.c
bootblock-y += gpio.c
diff --git a/src/mainboard/google/volteer/variants/ripto/Makefile.inc b/src/mainboard/google/volteer/variants/ripto/Makefile.inc
index 02b6f51..13269db 100644
--- a/src/mainboard/google/volteer/variants/ripto/Makefile.inc
+++ b/src/mainboard/google/volteer/variants/ripto/Makefile.inc
@@ -1,8 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
-## Memory Options # DRAM ID # Part Num
-SPD_SOURCES = SPD_LPDDR4X_200b_8bank_1Rx16_16Gb_DDP_4267 # 0b0000 # K4U6E3S4AA-MGCL
-
bootblock-y += gpio.c
ramstage-y += gpio.c
diff --git a/src/mainboard/google/volteer/variants/volteer/Makefile.inc b/src/mainboard/google/volteer/variants/volteer/Makefile.inc
deleted file mode 100644
index 2cf0adc..0000000
--- a/src/mainboard/google/volteer/variants/volteer/Makefile.inc
+++ /dev/null
@@ -1,8 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-or-later
-
-## Memory Options # DRAM ID # Part Num
-SPD_SOURCES = SPD_LPDDR4X_200b_1R_16Gb_DDP_4267 # 0b0000 # K4U6E3S4AA-MGCL
-# # 0b0000 # H9HCNNNBKMMLXR-NEE
-SPD_SOURCES += SPD_LPDDR4X_200b_8bank_2Rx16_32Gb_DDP_4267 # 0b0001 # K4UBE3D4AA-MGCL
-SPD_SOURCES += SPD_LPDDR4X_200b_2R_32Gb_QDP_4267 # 0b0010 # MT53E1G32D2NP-046 WT:A
-SPD_SOURCES += SPD_LPDDR4X_200b_2R_64Gb_ODP_4267 # 0b0011 # H9HCNNNFAMMLXR-NEE
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