Attention is currently required from: Rex-BC Chen, Yu-Ping Wu.

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• Commit Message:

  • Patch Set #1, Line 9: Fix GPIO pu/pd offset.

    In file MT8195 Register Map_V0.2 -1.pdf […]

    Thanks. Please put this in commit description

     soc/mediatek/mt8195: fix GPIO register offset

     Correct the offsets by MT8195 Register Map V0.2-1
     chapter: 3.2 GPIO Controller (page 3272)

     Control register names:
        PUPD_CFG0
        PU_CFG0

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