2 comments:
File src/arch/x86/postcar_loader.c:
Patch Set #1, Line 135: MTRR_TYPE_WRPROT
It's not marked as WB yet. It should be the same type as passed in below.
0x00000000fef00006: PHYBASE0: Address = 0x00000000fef00000, WB
DCACHE_RAM_BASE is already marked as WB, setting enable_top_of_ram_cache() region again WB, i'm seeing issue. (causes system hang)
Patch Set #1, Line 138: postcar_frame_add_ramcache
This name is weird. I think it should reflect that it's top of 32-bit DRAM usage.
name i will fix it
To view, visit change 34805. To unsubscribe, or for help writing mail filters, visit settings.