Rex Chou has uploaded this change for review.
mb/google/nissa/var/craaskov: Modify thermal table and add fan performance control
1. Modify 6w/15w thermal table based on "Project_Craaskov_FW_Thermal_paramters_list_20240104_1.xlsx".
2. Add 6w and 15w fan performance control.
3. 6W MSR power limit_1 power(Watts) please change to 20.
4. 15W MSR power limit_1 power(Watts) please change to 20.
BUG=b:290705146, b:318454915
TEST=emerge-nissa coreboot chromeos-bootimage
Thermal team test pass.
Change-Id: I15fa4b8f7c7088ff56da6493659ae45572913b5a
Signed-off-by: Rex Chou <rex_chou@compal.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/craaskov/overridetree.cb
1 file changed, 86 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/79890/1
diff --git a/src/mainboard/google/brya/variants/craaskov/overridetree.cb b/src/mainboard/google/brya/variants/craaskov/overridetree.cb
index cc4ce53..be73526 100644
--- a/src/mainboard/google/brya/variants/craaskov/overridetree.cb
+++ b/src/mainboard/google/brya/variants/craaskov/overridetree.cb
@@ -98,6 +98,18 @@
register "tcc_offset" = "8"
+ register "power_limits_config[ADL_N_041_6W_CORE]" = "{
+ .tdp_pl1_override = 20,
+ .tdp_pl2_override = 25,
+ .tdp_pl4 = 78,
+ }"
+
+ register "power_limits_config[ADL_N_081_15W_CORE]" = "{
+ .tdp_pl1_override = 20,
+ .tdp_pl2_override = 35,
+ .tdp_pl4 = 83,
+ }"
+
device domain 0 on
device ref dtt on
chip drivers/intel/dptf
@@ -111,13 +123,25 @@
[0] = {
.target = DPTF_CPU,
.thresholds = {
- TEMP_PCT(0, 0),
- TEMP_PCT(35, 27),
- TEMP_PCT(38, 31),
- TEMP_PCT(39, 35),
- TEMP_PCT(42, 41),
- TEMP_PCT(60, 47),
TEMP_PCT(70, 100),
+ TEMP_PCT(60, 65),
+ TEMP_PCT(42, 60),
+ TEMP_PCT(39, 55),
+ TEMP_PCT(38, 50),
+ TEMP_PCT(35, 43),
+ TEMP_PCT(31, 30),
+ }
+ },
+ [1] = {
+ .target = DPTF_TEMP_SENSOR_0,
+ .thresholds = {
+ TEMP_PCT(60, 100),
+ TEMP_PCT(55, 65),
+ TEMP_PCT(52, 60),
+ TEMP_PCT(50, 55),
+ TEMP_PCT(48, 50),
+ TEMP_PCT(45, 43),
+ TEMP_PCT(41, 30),
}
}
}"
@@ -162,6 +186,25 @@
[2] = { 16, 1000 },
[3] = { 8, 500 }
}"
+
+ ## Fan Performance Control (Percent, Speed, Noise, Power)
+ register "controls.fan_perf" = "{
+ [0] = { 100, 6000, 220, 2200, },
+ [1] = { 92, 5500, 180, 1800, },
+ [2] = { 85, 5000, 145, 1450, },
+ [3] = { 70, 4400, 115, 1150, },
+ [4] = { 56, 3900, 90, 900, },
+ [5] = { 45, 3300, 55, 550, },
+ [6] = { 38, 3000, 30, 300, },
+ [7] = { 33, 2900, 15, 150, },
+ [8] = { 10, 800, 10, 100, },
+ [9] = { 0, 0, 0, 50, }
+ }"
+
+ ## Fan options
+ register "options.fan.fine_grained_control" = "1"
+ register "options.fan.step_size" = "2"
+
device generic 0 on
probe THERMAL_SOLUTION THERMAL_SOLUTION_6W
end
@@ -177,13 +220,25 @@
[0] = {
.target = DPTF_CPU,
.thresholds = {
- TEMP_PCT(0, 0),
- TEMP_PCT(35, 27),
- TEMP_PCT(38, 31),
- TEMP_PCT(39, 35),
- TEMP_PCT(42, 41),
- TEMP_PCT(60, 47),
TEMP_PCT(70, 100),
+ TEMP_PCT(60, 65),
+ TEMP_PCT(42, 58),
+ TEMP_PCT(39, 53),
+ TEMP_PCT(38, 47),
+ TEMP_PCT(35, 43),
+ TEMP_PCT(31, 30),
+ }
+ },
+ [1] = {
+ .target = DPTF_TEMP_SENSOR_0,
+ .thresholds = {
+ TEMP_PCT(60, 100),
+ TEMP_PCT(55, 65),
+ TEMP_PCT(52, 58),
+ TEMP_PCT(50, 53),
+ TEMP_PCT(48, 47),
+ TEMP_PCT(45, 43),
+ TEMP_PCT(41, 30),
}
}
}"
@@ -228,6 +283,25 @@
[2] = { 16, 1000 },
[3] = { 8, 500 }
}"
+
+ ## Fan Performance Control (Percent, Speed, Noise, Power)
+ register "controls.fan_perf" = "{
+ [0] = { 100, 6000, 220, 2200, },
+ [1] = { 92, 5500, 180, 1800, },
+ [2] = { 85, 5000, 145, 1450, },
+ [3] = { 70, 4400, 115, 1150, },
+ [4] = { 56, 3900, 90, 900, },
+ [5] = { 45, 3300, 55, 550, },
+ [6] = { 38, 3000, 30, 300, },
+ [7] = { 33, 2900, 15, 150, },
+ [8] = { 10, 800, 10, 100, },
+ [9] = { 0, 0, 0, 50, }
+ }"
+
+ ## Fan options
+ register "options.fan.fine_grained_control" = "1"
+ register "options.fan.step_size" = "2"
+
device generic 1 on
probe THERMAL_SOLUTION THERMAL_SOLUTION_15W
end
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