Jacob Garber has uploaded this change for review.
soc/nvidia/tegra124: Correct bitwise operation
We want to selectively enable those bits, not overwrite the whole
register, so use |=.
Change-Id: Ia8c0ea5a58e25b3b58ed82caba20f8e49a30fb68
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1287070
---
M src/soc/nvidia/tegra124/sor.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/34560/1
diff --git a/src/soc/nvidia/tegra124/sor.c b/src/soc/nvidia/tegra124/sor.c
index 52b909e..5f26d1c 100644
--- a/src/soc/nvidia/tegra124/sor.c
+++ b/src/soc/nvidia/tegra124/sor.c
@@ -351,7 +351,7 @@
reg_val &= ~(APBDEV_PMC_IO_DPD2_REQ_LVDS_ON ||
APBDEV_PMC_IO_DPD2_REQ_CODE_DEFAULT_MASK);
- reg_val = up ? APBDEV_PMC_IO_DPD2_REQ_LVDS_ON |
+ reg_val |= up ? APBDEV_PMC_IO_DPD2_REQ_LVDS_ON |
APBDEV_PMC_IO_DPD2_REQ_CODE_DPD_OFF :
APBDEV_PMC_IO_DPD2_REQ_LVDS_OFF |
APBDEV_PMC_IO_DPD2_REQ_CODE_DPD_ON;
To view, visit change 34560. To unsubscribe, or for help writing mail filters, visit settings.