Kyösti Mälkki merged this change.

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Approvals:
  build bot (Jenkins): Verified
  Kyösti Mälkki: Looks good to me, approved
  Angel Pons: Looks good to me, but someone else must approve
  Name of user not set #1002532: Looks good to me, but someone else must approve

fsp_baytrail/fsp_broadwell_de: Sort entries in Makefile.inc

Change-Id: I12e6ec4aec7dcadcbb886c3fc4c3b9126a0a835c
Signed-off-by: Sourabh Kashyap <sourabhka@hcl.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34744
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
---
M src/soc/intel/fsp_baytrail/Makefile.inc
M src/soc/intel/fsp_baytrail/fsp/Makefile.inc
M src/soc/intel/fsp_broadwell_de/Makefile.inc
3 files changed, 51 insertions(+), 44 deletions(-)

diff --git a/src/soc/intel/fsp_baytrail/Makefile.inc b/src/soc/intel/fsp_baytrail/Makefile.inc
index 3a58be9..fa71932 100644
--- a/src/soc/intel/fsp_baytrail/Makefile.inc
+++ b/src/soc/intel/fsp_baytrail/Makefile.inc
@@ -17,47 +17,51 @@
 
 ifeq ($(CONFIG_SOC_INTEL_FSP_BAYTRAIL),y)
 
+subdirs-y += fsp
 subdirs-y += romstage
+subdirs-y += ../../../cpu/intel/microcode
+subdirs-y += ../../../cpu/intel/turbo
+subdirs-y += ../../../cpu/x86/cache
 subdirs-y += ../../../cpu/x86/lapic
 subdirs-y += ../../../cpu/x86/mtrr
 subdirs-y += ../../../cpu/x86/smm
 subdirs-y += ../../../cpu/x86/tsc
-subdirs-y += ../../../cpu/x86/cache
-subdirs-y += ../../../cpu/intel/microcode
-subdirs-y += ../../../cpu/intel/turbo
 subdirs-y += ../../../lib/fsp
-subdirs-y += fsp
 
-ramstage-y += memmap.c
-romstage-y += memmap.c
-ramstage-y += tsc_freq.c
-romstage-y += tsc_freq.c
-postcar-y += tsc_freq.c
-smm-y += tsc_freq.c
-ramstage-y += spi.c
-romstage-y += spi.c
-smm-y += spi.c
-ramstage-y += chip.c
-ramstage-y += iosf.c
-romstage-y += iosf.c
-ramstage-y += northcluster.c
-ramstage-y += ramstage.c
-ramstage-y += gpio.c
 romstage-y += gpio.c
+romstage-y += iosf.c
+romstage-y += memmap.c
 romstage-y += pmutil.c
-ramstage-y += pmutil.c
-ramstage-y += southcluster.c
-ramstage-y += cpu.c
+romstage-y += spi.c
+romstage-y += tsc_freq.c
+
+postcar-y += tsc_freq.c
+
 ramstage-y += acpi.c
+ramstage-y += chip.c
+ramstage-y += cpu.c
+ramstage-y += gfx.c
+ramstage-y += gpio.c
+ramstage-y += i2c.c
+ramstage-y += iosf.c
 ramstage-y += lpe.c
 ramstage-y += lpss.c
-smm-y += pmutil.c
-smm-y += smihandler.c
+ramstage-y += memmap.c
+ramstage-y += northcluster.c
+ramstage-y += pmutil.c
+ramstage-y += ramstage.c
+ramstage-y += southcluster.c
+ramstage-y += spi.c
+ramstage-y += tsc_freq.c
 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smm.c
 
+smm-y += pmutil.c
+smm-y += smihandler.c
+smm-y += spi.c
+smm-y += tsc_freq.c
+
+# Remove as ramstage gets fleshed out
 ramstage-y += placeholders.c
-ramstage-y += i2c.c
-ramstage-y += gfx.c
 
 CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/include
 CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/fsp
diff --git a/src/soc/intel/fsp_baytrail/fsp/Makefile.inc b/src/soc/intel/fsp_baytrail/fsp/Makefile.inc
index 09c5bc5..024dd70 100644
--- a/src/soc/intel/fsp_baytrail/fsp/Makefile.inc
+++ b/src/soc/intel/fsp_baytrail/fsp/Makefile.inc
@@ -13,5 +13,5 @@
 # GNU General Public License for more details.
 #
 
-ramstage-y += chipset_fsp_util.c
 romstage-y += chipset_fsp_util.c
+ramstage-y += chipset_fsp_util.c
diff --git a/src/soc/intel/fsp_broadwell_de/Makefile.inc b/src/soc/intel/fsp_broadwell_de/Makefile.inc
index c73c12a..52f16d3 100644
--- a/src/soc/intel/fsp_broadwell_de/Makefile.inc
+++ b/src/soc/intel/fsp_broadwell_de/Makefile.inc
@@ -1,44 +1,47 @@
 ifeq ($(CONFIG_SOC_INTEL_FSP_BROADWELL_DE),y)
 
+subdirs-y += fsp
 subdirs-y += romstage
 subdirs-y += ../../../cpu/intel/microcode
 subdirs-y += ../../../cpu/intel/turbo
+subdirs-y += ../../../cpu/x86/cache
 subdirs-y += ../../../cpu/x86/lapic
 subdirs-y += ../../../cpu/x86/mtrr
 subdirs-y += ../../../cpu/x86/smm
 subdirs-y += ../../../cpu/x86/tsc
-subdirs-y += ../../../cpu/x86/cache
 subdirs-y += ../../../lib/fsp
-subdirs-y += fsp
 
 romstage-y += gpio.c
-ramstage-y += cpu.c
-ramstage-y += chip.c
-ramstage-y += northcluster.c
-ramstage-y += ramstage.c
-ramstage-y += tsc_freq.c
 romstage-y += memmap.c
-ramstage-y += memmap.c
-ramstage-y += southcluster.c
-ramstage-y += acpi.c
-ramstage-y += smbus_common.c
-ramstage-y += smbus.c
 romstage-y += tsc_freq.c
+
 postcar-y += tsc_freq.c
-ramstage-y += smi.c
+
+ramstage-y += acpi.c
+ramstage-y += chip.c
+ramstage-y += cpu.c
 ramstage-y += gpio.c
 ramstage-y += iou_complto.c
-ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c
-ramstage-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c
+ramstage-y += memmap.c
+ramstage-y += northcluster.c
+ramstage-y += ramstage.c
+ramstage-y += smbus.c
+ramstage-y += smbus_common.c
+ramstage-y += smi.c
+ramstage-y += southcluster.c
+ramstage-y += tsc_freq.c
 ramstage-y += vtd.c
+ramstage-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c
+ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c
+
 smm-y += pmutil.c
 smm-y += smihandler.c
 smm-y += tsc_freq.c
 
+cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-56-*)
+
 CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/include
 CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/fsp
 CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/
 
-cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-56-*)
-
 endif # ifeq ($(CONFIG_SOC_INTEL_FSP_BROADWELL_DE),y)

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