huayang duan uploaded patch set #2 to this change.

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mediatek/mt8183: fix mode register setting fail issue

the mode register setting of DRAM maybe failed without delay operate,
need add delay after each MR write.

BUG=b:80501386
BRANCH=none
TEST=Boots correctly and stress test pass on Kukui.

Change-Id: I51785e90b2014994be5018bfe543245d44626242
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
---
M src/soc/mediatek/mt8183/dramc_init_setting.c
1 file changed, 128 insertions(+), 44 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/32284/2

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I51785e90b2014994be5018bfe543245d44626242
Gerrit-Change-Number: 32284
Gerrit-PatchSet: 2
Gerrit-Owner: huayang duan <huayangduan@gmail.com>
Gerrit-Reviewer: Julius Werner <jwerner@chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-Reviewer: huayang duan <huayangduan@gmail.com>
Gerrit-MessageType: newpatchset