Julius Werner merged this change.
sdm845: Add QCLib to RomStage to perform IP init
CB acts as I/O handler for QCLib (e.g. DDR training data)
This interface allows bi-directional data flow between
CB and QCLib
Tested and working interfaces:
DDR Training data
QCLib serial console output
DDR Information (base & size)
limits cfg data
TEST=build & run
Change-Id: I073186674a1a593547d1ee1d15c7cd4fd8ad5bc1
Signed-off-by: T Michael Turney <mturney@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/25208
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
---
M src/mainboard/google/cheza/chromeos.fmd
M src/mainboard/google/cheza/romstage.c
M src/soc/qualcomm/sdm845/Makefile.inc
M src/soc/qualcomm/sdm845/include/soc/memlayout.ld
M src/soc/qualcomm/sdm845/include/soc/mmu.h
M src/soc/qualcomm/sdm845/include/soc/symbols.h
M src/soc/qualcomm/sdm845/mmu.c
A src/soc/qualcomm/sdm845/qclib.c
M src/soc/qualcomm/sdm845/soc.c
9 files changed, 84 insertions(+), 22 deletions(-)
diff --git a/src/mainboard/google/cheza/chromeos.fmd b/src/mainboard/google/cheza/chromeos.fmd
index 71e8556..b0d2d99 100644
--- a/src/mainboard/google/cheza/chromeos.fmd
+++ b/src/mainboard/google/cheza/chromeos.fmd
@@ -24,16 +24,15 @@
RO_FRID 0x100
}
RO_VPD(PRESERVE) 16K
- # TODO(hungte): Remove RO_PRESERVE.
- RO_PRESERVE(PRESERVE) {
- RO_DDR_TRAINING 8K
- RO_FSG
- }
+ RO_DDR_TRAINING(PRESERVE) 8K
+ RO_LIMITS_CFG(PRESERVE) 4K
+ RO_FSG(PRESERVE)
}
RW_VPD(PRESERVE) 32K
RW_NVRAM(PRESERVE) 16K
- RW_DDR_TRAINING 8K
+ RW_DDR_TRAINING(PRESERVE) 8K
+ RW_LIMITS_CFG(PRESERVE) 4K
RW_ELOG(PRESERVE) 4K
RW_SHARED 4K {
SHARED_DATA
diff --git a/src/mainboard/google/cheza/romstage.c b/src/mainboard/google/cheza/romstage.c
index 7b7da4c..de737b1 100644
--- a/src/mainboard/google/cheza/romstage.c
+++ b/src/mainboard/google/cheza/romstage.c
@@ -15,6 +15,7 @@
#include <arch/stages.h>
#include <soc/usb.h>
+#include <soc/qclib_common.h>
static void prepare_usb(void)
{
@@ -28,4 +29,7 @@
void platform_romstage_main(void)
{
prepare_usb();
+
+ /* QCLib: DDR init & train */
+ qclib_load_and_run();
}
diff --git a/src/soc/qualcomm/sdm845/Makefile.inc b/src/soc/qualcomm/sdm845/Makefile.inc
index d099bff..78b3568 100644
--- a/src/soc/qualcomm/sdm845/Makefile.inc
+++ b/src/soc/qualcomm/sdm845/Makefile.inc
@@ -25,6 +25,10 @@
romstage-y += clock.c
romstage-$(CONFIG_SDM845_QSPI) += qspi.c
romstage-y += usb.c
+romstage-y += ../common/qclib.c
+romstage-y += qclib.c
+romstage-y += ../common/mmu.c
+romstage-y += mmu.c
################################################################################
ramstage-y += soc.c
@@ -39,6 +43,7 @@
################################################################################
CPPFLAGS_common += -Isrc/soc/qualcomm/sdm845/include
+CPPFLAGS_common += -Isrc/soc/qualcomm/common/include
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf "Generating: $(subst $(obj)/,,$(@))\n"
diff --git a/src/soc/qualcomm/sdm845/include/soc/memlayout.ld b/src/soc/qualcomm/sdm845/include/soc/memlayout.ld
index 7063c69..b1b6333 100644
--- a/src/soc/qualcomm/sdm845/include/soc/memlayout.ld
+++ b/src/soc/qualcomm/sdm845/include/soc/memlayout.ld
@@ -28,11 +28,12 @@
{
SSRAM_START(0x14680000)
OVERLAP_VERSTAGE_ROMSTAGE(0x14680000, 100K)
- DMA_COHERENT(0x14699000, 0x2000)
+ DMA_COHERENT(0x14699000, 8K)
+ REGION(qcsdi, 0x146AC000, 44K, 4K)
SSRAM_END(0x146C0000)
BSRAM_START(0x14800000)
- REGION(fw_reserved2, 0x14800000, 0x16000, 4096)
+ REGION(fw_reserved2, 0x14800000, 0x16000, 0x1000)
BOOTBLOCK(0x14816000, 40K)
TTB(0x14820000, 56K)
VBOOT2_WORK(0x1482E000, 12K)
@@ -40,15 +41,19 @@
TIMESTAMP(0x14836000, 1K)
PRERAM_CBMEM_CONSOLE(0x14836400, 32K)
PRERAM_CBFS_CACHE(0x1483E400, 70K)
- REGION(bsram_unused, 0x1484FC00, 0xA2400, 0x100)
- REGION(qclib, 0x148F2000, 0x80000, 4096)
- REGION(dcb, 0x14972000, 0x4000, 4096)
- REGION(pmic, 0x14976000, 0xA000, 4096)
+ REGION(bsram_unused, 0x1484FC00, 0x9E300, 0x100)
+ REGION(ddr_information, 0x148EDF00, 256, 256)
+ REGION(limits_cfg, 0x148EE000, 4K, 4K)
+ REGION(qclib_serial_log, 0x148EF000, 4K, 4K)
+ REGION(ddr_training, 0x148F0000, 8K, 4K)
+ REGION(qclib, 0x148F2000, 512K, 4K)
+ REGION(dcb, 0x14972000, 16K, 4K)
+ REGION(pmic, 0x14976000, 40K, 4K)
BSRAM_END(0x14980000)
DRAM_START(0x80000000)
/* Various hardware/software subsystems make use of this area */
- REGION(dram_reserved, 0x85000000, 0x1A800000, 4096)
+ REGION(dram_reserved, 0x85000000, 0x1A800000, 0x1000)
POSTRAM_CBFS_CACHE(0x9F800000, 384K)
- RAMSTAGE(0x9F860000, 128K)
+ RAMSTAGE(0x9F860000, 2M)
}
diff --git a/src/soc/qualcomm/sdm845/include/soc/mmu.h b/src/soc/qualcomm/sdm845/include/soc/mmu.h
index 299700a..c9883bc 100644
--- a/src/soc/qualcomm/sdm845/include/soc/mmu.h
+++ b/src/soc/qualcomm/sdm845/include/soc/mmu.h
@@ -16,8 +16,6 @@
#ifndef _SOC_QUALCOMM_SDM845_MMU_H__
#define _SOC_QUALCOMM_SDM845_MMU_H__
-#define DRAMSIZE4GB 0x100000000
-
void sdm845_mmu_init(void);
#endif // _SOC_QUALCOMM_SDM845_MMU_H_
diff --git a/src/soc/qualcomm/sdm845/include/soc/symbols.h b/src/soc/qualcomm/sdm845/include/soc/symbols.h
index 1c14c03..e7bf1b2 100644
--- a/src/soc/qualcomm/sdm845/include/soc/symbols.h
+++ b/src/soc/qualcomm/sdm845/include/soc/symbols.h
@@ -17,10 +17,12 @@
#define _SOC_QUALCOMM_SDM845_SYMBOLS_H_
#include <symbols.h>
-#include <types.h>
DECLARE_REGION(ssram)
DECLARE_REGION(bsram)
DECLARE_REGION(dram_reserved)
+DECLARE_REGION(dcb);
+DECLARE_REGION(pmic);
+DECLARE_REGION(limits_cfg);
#endif // _SOC_QUALCOMM_SDM845_SYMBOLS_H_
diff --git a/src/soc/qualcomm/sdm845/mmu.c b/src/soc/qualcomm/sdm845/mmu.c
index ef6c058..ec5fa55 100644
--- a/src/soc/qualcomm/sdm845/mmu.c
+++ b/src/soc/qualcomm/sdm845/mmu.c
@@ -17,12 +17,9 @@
#include <arch/mmu.h>
#include <arch/cache.h>
#include <soc/mmu.h>
+#include <soc/mmu_common.h>
#include <soc/symbols.h>
-#define CACHED_RAM (MA_MEM | MA_S | MA_RW)
-#define UNCACHED_RAM (MA_MEM | MA_S | MA_RW | MA_MEM_NC)
-#define DEV_MEM (MA_DEV | MA_S | MA_RW)
-
void sdm845_mmu_init(void)
{
mmu_init();
diff --git a/src/soc/qualcomm/sdm845/qclib.c b/src/soc/qualcomm/sdm845/qclib.c
new file mode 100644
index 0000000..9c05452
--- /dev/null
+++ b/src/soc/qualcomm/sdm845/qclib.c
@@ -0,0 +1,50 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <cbfs.h>
+#include <fmap.h>
+#include <console/console.h>
+#include <soc/symbols.h>
+#include <soc/qclib_common.h>
+
+int qclib_soc_blob_load(void)
+{
+ size_t size;
+ ssize_t ssize;
+
+ /* Attempt to load PMICCFG Blob */
+ size = cbfs_boot_load_file(CONFIG_CBFS_PREFIX "/pmiccfg",
+ _pmic, REGION_SIZE(pmic), CBFS_TYPE_RAW);
+ if (!size)
+ return -1;
+ qclib_add_if_table_entry(QCLIB_TE_PMIC_SETTINGS, _pmic, size, 0);
+
+ /* Attempt to load DCB Blob */
+ size = cbfs_boot_load_file(CONFIG_CBFS_PREFIX "/dcb",
+ _dcb, REGION_SIZE(dcb), CBFS_TYPE_RAW);
+ if (!size)
+ return -1;
+ qclib_add_if_table_entry(QCLIB_TE_DCB_SETTINGS, _dcb, size, 0);
+
+ /* Attempt to load Limits Config Blob */
+ ssize = fmap_read_area(QCLIB_FR_LIMITS_CFG_DATA, _limits_cfg,
+ REGION_SIZE(limits_cfg));
+ if (ssize < 0)
+ return -1;
+ qclib_add_if_table_entry(QCLIB_TE_LIMITS_CFG_DATA,
+ _limits_cfg, ssize, 0);
+
+ return 0;
+}
diff --git a/src/soc/qualcomm/sdm845/soc.c b/src/soc/qualcomm/sdm845/soc.c
index bc7235f..ef283c0 100644
--- a/src/soc/qualcomm/sdm845/soc.c
+++ b/src/soc/qualcomm/sdm845/soc.c
@@ -16,11 +16,13 @@
#include <symbols.h>
#include <device/device.h>
#include <soc/mmu.h>
+#include <soc/mmu_common.h>
#include <soc/symbols.h>
static void soc_read_resources(struct device *dev)
{
- ram_resource(dev, 0, (uintptr_t)_dram / KiB, DRAMSIZE4GB / KiB);
+ ram_resource(dev, 0, (uintptr_t)ddr_region->offset / KiB,
+ ddr_region->size / KiB);
reserved_ram_resource(dev, 1, (uintptr_t)_dram_reserved / KiB,
REGION_SIZE(dram_reserved) / KiB);
}
To view, visit change 25208. To unsubscribe, or for help writing mail filters, visit settings.