1 comment:
File src/soc/intel/alderlake/romstage/fsp_params.c:
!is_dev_enabled(dev) ? 0
: pcie_rp_init(m_cfg, CPU_PCIE_RP, config->cpu_pcie_rp, CONFIG_MAX_ROOT_PORTS);
suggestion: I think this reads easier inverted, i.e., […]
I am waiting for Intel answer, still not clear CPU PCIE only relay on this port or not... If not, we can change simply = pie_rp_init...
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