Lijian Zhao has uploaded this change for review.
mb/google/sarien: Set CPU boot up mode to turbo
Set CPU to be running at non-turbo maxium speed first and then switch to
turbo maxium speed to accelerate boot performance.
BUG=N/A
TEST=Boot up with sarien platform, check with cbmem -t, boot time had
been 110ms less.
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Change-Id: I43bdb7ef82a5e6e147b3b506756c118dacdb0321
---
M src/mainboard/google/sarien/variants/arcada/devicetree.cb
M src/mainboard/google/sarien/variants/sarien/devicetree.cb
2 files changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/30446/1
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
index 52840de..ce83d10 100644
--- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
@@ -24,6 +24,7 @@
register "SkipExtGfxScan" = "1"
register "VmxEnable" = "1"
+ register "bootfreq" = "2"
register "speed_shift_enable" = "1"
register "s0ix_enable" = "1"
register "dptf_enable" = "1"
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
index 47abadc..98566f1 100644
--- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
@@ -28,6 +28,7 @@
register "SkipExtGfxScan" = "1"
register "VmxEnable" = "1"
+ register "bootfreq" = "2"
register "speed_shift_enable" = "1"
register "s0ix_enable" = "1"
register "dptf_enable" = "1"
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