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• File src/southbridge/intel/lynxpoint/lpc.c:

  • Patch Set #12, Line 336: RCBA32(0x3a80) =

    tbh I'm not sure if I like this way of setting registers... […]

    MCHBAR, DMIBAR and EPBAR also use this type of operations. I guess I could make `rcba_write32` and friends to handle this. I've already written Haswell raminit using mchbarx_read and mchbarx_write functions because I need to do pure 64-bit register writes (the write must be atomic, thus cannot be two 32-bit writes), and MCHBARx macros were inconsistent.

    If I do it properly, all platforms should be reproducible. But if I first deduplicate the code for Broadwell, I will have less work to do 😄

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