Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46725 ) Change subject: sb/intel/lynxpoint/lpc.c: Simplify PM init sequence ...................................................................... Patch Set 12: (1 comment) https://review.coreboot.org/c/coreboot/+/46725/12/src/southbridge/intel/lynx... File src/southbridge/intel/lynxpoint/lpc.c: https://review.coreboot.org/c/coreboot/+/46725/12/src/southbridge/intel/lynx... PS12, Line 336: RCBA32(0x3a80) =
tbh I'm not sure if I like this way of setting registers... […] MCHBAR, DMIBAR and EPBAR also use this type of operations. I guess I could make `rcba_write32` and friends to handle this. I've already written Haswell raminit using mchbarx_read and mchbarx_write functions because I need to do pure 64-bit register writes (the write must be atomic, thus cannot be two 32-bit writes), and MCHBARx macros were inconsistent.
If I do it properly, all platforms should be reproducible. But if I first deduplicate the code for Broadwell, I will have less work to do 😄 -- To view, visit https://review.coreboot.org/c/coreboot/+/46725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21e79cbc1e995707b87c40187ddf03b872d02058 Gerrit-Change-Number: 46725 Gerrit-PatchSet: 12 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss@mniewoehner.de> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net> Gerrit-Comment-Date: Fri, 30 Oct 2020 09:19:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michael Niewöhner <foss@mniewoehner.de> Gerrit-MessageType: comment