Marc Jones has uploaded this change for review.

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mainboard/ocp/tiogapass: Set longer BMC timeout

The BMC isn't always ready in 60 seconds if it printing debug output.
Give it 90 seconds to finish before timing out in coreboot.

Change-Id: I3932d3e8fad067e8971e82b45b499801fc78079f
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
---
M src/mainboard/ocp/tiogapass/devicetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/47306/1

diff --git a/src/mainboard/ocp/tiogapass/devicetree.cb b/src/mainboard/ocp/tiogapass/devicetree.cb
index 33f4090..008633b 100644
--- a/src/mainboard/ocp/tiogapass/devicetree.cb
+++ b/src/mainboard/ocp/tiogapass/devicetree.cb
@@ -74,7 +74,7 @@
 			chip drivers/ipmi # BMC KCS
 				device pnp ca2.0 on end
 				register "bmc_i2c_address" = "0x20"
-				register "bmc_boot_timeout" = "60"
+				register "bmc_boot_timeout" = "90"
 			end
 		end # Intel Corporation C621 Series Chipset LPC/eSPI Controller
 		device pci 1f.2 on end # Intel Corporation C620 Series Chipset Family Power Management Controller

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