Attention is currently required from: Jonathan Zhang, Johnny Lin, Christian Walter, Elyes Haouas, Tim Chu.

Patch set 1:Code-Review -1

4 comments:

Patchset:
- Patch Set #1:
  What does this exactly fix? Do you if all of these are actually wrong or intended?
File src/drivers/usb/pci_ehci.c:
- Patch Set #1, Line 53:
```
pci_s_write_config8(dev, PCI_COMMAND, PCI_COMMAND_MEMORY |
		PCI_COMMAND_MASTER);
```
  Do you know if it might be intended to leave the upper bits untouched?
File src/soc/intel/common/block/cse/cse.c:
- Patch Set #1, Line 985: pci_or_config32(dev, PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
  Do you know if clearing the status registers bit was intended or not here?
File src/southbridge/amd/cimx/sb800/late.c:
- Patch Set #1, Line 100:
```
	dev->command |= PCI_COMMAND_MASTER;
	pci_write_config8(dev, PCI_COMMAND, dev->command);
```
  Do you know if skip setting the upper 8bit is intended?

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