2 comments:
Patch Set #4, Line 12: Drive OEB 7:GPP_A7 and OEB 6:GPP_E5 low
Added W/A in commit msg, hope that is okay
SG. Thanks!
File src/mainboard/intel/adlrvp/devicetree.cb:
Patch Set #4, Line 54: free running CLK
you mean PcieClkSrcUsage[6]="7" ? because CLK6 is for RP6 already. […]
Why is that? Don't mean to block this change, but I am interested in understanding why the normal configuration as stated above does not work. Is there a hardware bug? Or any other limitation you are aware of?
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