Attention is currently required from: Arthur Heymans, Chen, Gang C, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu.

Shuo Liu would like Chen, Gang C to review this change.

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soc/intel/xeon_sp/gnr: Support fast boot

Fast boot will used pre-saved hardware configuration data to
accelerate the boot process, e.g. DDR training is skipped by using
pre-saved training data.

Change-Id: Ib5dc76176b16ea1be5dd9b05a375c9179411f590
Signed-off-by: Gang Chen <gang.c.chen@intel.com>
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
---
A src/soc/intel/xeon_sp/gnr/include/soc/vpd.h
M src/soc/intel/xeon_sp/gnr/romstage.c
2 files changed, 24 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/82080/1
diff --git a/src/soc/intel/xeon_sp/gnr/include/soc/vpd.h b/src/soc/intel/xeon_sp/gnr/include/soc/vpd.h
new file mode 100644
index 0000000..ae0fceb
--- /dev/null
+++ b/src/soc/intel/xeon_sp/gnr/include/soc/vpd.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef _SOC_VPD_H_
+#define _SOC_VPD_H_
+
+#define FAST_BOOT_EN "fast_boot_en" /* 1 or 0: enable or disable fast boot for warm/cold reset */
+#define FAST_BOOT_EN_DEFAULT 1 /* Default value when this VPD variable is not found */
+
+#endif /* _SOC_VPD_H_ */
diff --git a/src/soc/intel/xeon_sp/gnr/romstage.c b/src/soc/intel/xeon_sp/gnr/romstage.c
index 10a2318..dda4364 100644
--- a/src/soc/intel/xeon_sp/gnr/romstage.c
+++ b/src/soc/intel/xeon_sp/gnr/romstage.c
@@ -13,6 +13,7 @@
#include <string.h>
#include <soc/soc_util.h>
#include <soc/ddr.h>
+#include <soc/vpd.h>

#include "chip.h"

@@ -68,6 +69,20 @@
m_cfg->serialDebugMsgLvl = config->serial_debug_msg_lvl;
m_cfg->SerialIoUartDebugIoBase = config->serial_io_uart_debug_io_base;

+ /* FAST_BOOT_EN */
+ uint8_t val = FAST_BOOT_EN_DEFAULT;
+ vpd_get_bool(FAST_BOOT_EN, VPD_RW_THEN_RO, &val);
+ m_cfg->AttemptFastBoot = val;
+ m_cfg->AttemptFastBootCold = val;
+
+ FSPM_ARCHx_UPD *arch_upd = &mupd->FspmArchUpd;
+ if ((arch_upd->NvsBufferPtr != 0) && (val != FAST_BOOT_EN_DEFAULT)) {
+ arch_upd->BootMode =
+ FSP_BOOT_WITH_FULL_CONFIGURATION;
+ printk(BIOS_NOTICE, "Reset BootMode as "
+ "FSP_BOOT_WITH_FULL_CONFIGURATION.\n");
+ }
+
/* Board level settings */
mainboard_memory_init_params(mupd);
}

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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ib5dc76176b16ea1be5dd9b05a375c9179411f590
Gerrit-Change-Number: 82080
Gerrit-PatchSet: 1
Gerrit-Owner: Shuo Liu <shuo.liu@intel.com>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Chen, Gang C <gang.c.chen@intel.com>
Gerrit-Reviewer: Christian Walter <christian.walter@9elements.com>
Gerrit-Reviewer: Johnny Lin <Johnny_Lin@wiwynn.com>
Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang@gmail.com>
Gerrit-Reviewer: Lean Sheng Tan <sheng.tan@9elements.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph@9elements.com>
Gerrit-Reviewer: Tim Chu <Tim.Chu@quantatw.com>
Gerrit-Attention: Patrick Rudolph <patrick.rudolph@9elements.com>
Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang@gmail.com>
Gerrit-Attention: Chen, Gang C <gang.c.chen@intel.com>
Gerrit-Attention: Johnny Lin <Johnny_Lin@wiwynn.com>
Gerrit-Attention: Christian Walter <christian.walter@9elements.com>
Gerrit-Attention: Arthur Heymans <arthur@aheymans.xyz>
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