Attention is currently required from: Philipp Hug, ron minnich.

Xiang W uploaded patch set #3 to this change.

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arch/riscv: Add SMP support for exception handling

The previous exception handling code does not support SMP. If start
Linux directly through coreboot, it will be a big problem.

Change-Id: Id8d3085bcd6f8883b08384f6bbf14052fd81fc2b
Signed-off-by: Xiang W <wxjstz@126.com>
---
M src/arch/riscv/bootblock.S
M src/arch/riscv/ramstage.S
M src/arch/riscv/trap_util.S
3 files changed, 17 insertions(+), 25 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/53944/3

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