Attention is currently required from: Paul Menzel, Angel Pons, Iru Cai.
12 comments:
Patchset:
Rebased on current master.
File Documentation/mainboard/hp/elitebook_820_g2.md:
Patch Set #8, Line 28: ## Programming
Isn't most of this section similar to that of another laptop with Sure Start?
Yes, most of the following is copied from folio_9480m.
Patch Set #8, Line 115: (needs a modified refcode)
Is this modification documented anywhere?
No.
- DisplayPort
- VGA
How about using a single entry for all video outputs? […]
Done
File src/mainboard/hp/elitebook_820_g2/Kconfig:
config VGA_BIOS_FILE
string
default "pci8086,1616.rom"
Please remove this. The file doesn't exist in the coreboot tree.
Done
File src/mainboard/hp/elitebook_820_g2/devicetree.cb:
nit: 0
Done
nit: 0
Done
Patch Set #8, Line 34: register "pcie_port_coalesce" = "1"
Is this needed? 1c. […]
Done
register "pcie_port_force_aspm" = "0"
register "sata_devslp_disable" = "0"
register "sata_devslp_mux" = "0"
devicetree settings default to zero already, I'd omit these.
Done
Patch Set #8, Line 70: SlotDataBusWidth2X
out of curiosity, how did you verify this?
`lspci -vvv` shows "LnkCap: Port #6, ... Width x2".
Patch Set #8, Line 73: device pci 1e.0 off end # PCI bridge
Doesn't exist since Lynx Point, please remove
Done
File src/mainboard/hp/elitebook_820_g2/pei_data.c:
Patch Set #8, Line 22: USB_PORT_BACK_PANEL);
Put these on the previous line?
Done
To view, visit change 46630. To unsubscribe, or for help writing mail filters, visit settings.