Christian Gmeiner has uploaded this change for review.

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intel/apollolake: Add early smbus support

Change-Id: Ic472c71998064d09c9caddc5c80c01e85a381c69
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
---
M src/soc/intel/apollolake/Kconfig
M src/soc/intel/apollolake/bootblock/bootblock.c
M src/soc/intel/apollolake/include/soc/smbus.h
3 files changed, 11 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/31461/1

diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 19cd296..f7ddc6f 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -85,6 +85,7 @@
 	select SOC_INTEL_COMMON_BLOCK_PCR
 	select SOC_INTEL_COMMON_BLOCK_P2SB
 	select SOC_INTEL_COMMON_BLOCK_PMC
+	select SOC_INTEL_COMMON_BLOCK_SMBUS
 	select SOC_INTEL_COMMON_BLOCK_SRAM
 	select SOC_INTEL_COMMON_BLOCK_RTC
 	select SOC_INTEL_COMMON_BLOCK_SA
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c
index cf3e839..99a9467 100644
--- a/src/soc/intel/apollolake/bootblock/bootblock.c
+++ b/src/soc/intel/apollolake/bootblock/bootblock.c
@@ -23,6 +23,7 @@
 #include <intelblocks/p2sb.h>
 #include <intelblocks/pcr.h>
 #include <intelblocks/rtc.h>
+#include <intelblocks/smbus.h>
 #include <intelblocks/systemagent.h>
 #include <intelblocks/pmclib.h>
 #include <intelblocks/tco.h>
@@ -112,6 +113,9 @@
 	/* Program TCO Timer Halt */
 	tco_configure();
 
+	/* Program SMBUS_BASE_ADDRESS and Enable it */
+	smbus_common_init();
+
 	/* Use Nx and paging to prevent the frontend from writing back dirty
 	 * cache-as-ram lines to backing store that doesn't exist when the L1I
 	 * speculatively fetches a line that is sitting in the L1D. */
diff --git a/src/soc/intel/apollolake/include/soc/smbus.h b/src/soc/intel/apollolake/include/soc/smbus.h
index 4b252d6..a4ff451 100644
--- a/src/soc/intel/apollolake/include/soc/smbus.h
+++ b/src/soc/intel/apollolake/include/soc/smbus.h
@@ -16,6 +16,9 @@
 #ifndef _SOC_APOLLOLAKE_SMBUS_H_
 #define _SOC_APOLLOLAKE_SMBUS_H_
 
+/* PCI Configuration Space (D31:F3): SMBus */
+#define SMB_RCV_SLVA           0x09
+
 /* TCO registers and fields live behind TCOBASE I/O bar in SMBus device. */
 #define TCO1_STS			0x04
 #define  TCO_TIMEOUT			(1 << 3)
@@ -25,4 +28,7 @@
 #define  TCO_LOCK			(1 << 12)
 #define  TCO_TMR_HLT			(1 << 11)
 
+/* SMBus I/O bits. */
+#define SMBUS_SLAVE_ADDR       0x24
+
 #endif

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