Angel Pons has uploaded this change for review.

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mb/hp/280_g2/romstage.c: Correct CaVrefConfig setting

With DDR4, CA Vref goes to channel 0, and CH1 Vref goes to channel 1.

Change-Id: I64606824b4f82affb0fcfc78e68ba29859a1cc69
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/mainboard/hp/280_g2/romstage.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/52110/1

diff --git a/src/mainboard/hp/280_g2/romstage.c b/src/mainboard/hp/280_g2/romstage.c
index 8f32d24..9b3d385 100644
--- a/src/mainboard/hp/280_g2/romstage.c
+++ b/src/mainboard/hp/280_g2/romstage.c
@@ -23,8 +23,8 @@
 
 	get_spd_smbus(&blk);
 
+	mem_cfg->CaVrefConfig = 2;
 	mem_cfg->DqPinsInterleaved = true;
-
 	mem_cfg->UserBd = BOARD_TYPE_DESKTOP;
 
 	mem_cfg->MemorySpdDataLen = blk.len;

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