Shreesh Chhabbi has uploaded this change for review.

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mainboard/volteer: Enable TcssDma1 and TbtPcie2 & 3

Change-Id: I40fda5506de52cfd7cf03093efa737a2c1bcb068
Signed-off-by: Shreesh Chhabbi <shreesh.chhabbi@intel.com>
---
M src/mainboard/google/volteer/variants/baseboard/devicetree.cb
1 file changed, 9 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/42442/1
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
index 8ff790e..c41fe2e 100644
--- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
@@ -150,12 +150,12 @@
register "TcssAuxOri" = "1"
register "IomTypeCPortPadCfg[0]" = "0x090E000A"
register "IomTypeCPortPadCfg[1]" = "0x090E000D"
- register "IomTypeCPortPadCfg[2]" = "0x0"
- register "IomTypeCPortPadCfg[3]" = "0x0"
- register "IomTypeCPortPadCfg[4]" = "0x0"
- register "IomTypeCPortPadCfg[5]" = "0x0"
- register "IomTypeCPortPadCfg[6]" = "0x0"
- register "IomTypeCPortPadCfg[7]" = "0x0"
+ register "IomTypeCPortPadCfg[2]" = "0x09000000"
+ register "IomTypeCPortPadCfg[3]" = "0x09000000"
+ register "IomTypeCPortPadCfg[4]" = "0x09000000"
+ register "IomTypeCPortPadCfg[5]" = "0x09000000"
+ register "IomTypeCPortPadCfg[6]" = "0x09000000"
+ register "IomTypeCPortPadCfg[7]" = "0x09000000"

# D3Hot and D3Cold for TCSS
register "TcssD3HotEnable" = "1"
@@ -267,15 +267,15 @@
device pci 06.0 off end # PEG60 0x9A09
device pci 07.0 on end # TBT_PCIe0 0x9A23
device pci 07.1 on end # TBT_PCIe1 0x9A25
- device pci 07.2 off end # TBT_PCIe2 0x9A27
- device pci 07.3 off end # TBT_PCIe3 0x9A29
+ device pci 07.2 on end # TBT_PCIe2 0x9A27
+ device pci 07.3 on end # TBT_PCIe3 0x9A29
device pci 08.0 on end # GNA 0x9A11
device pci 09.0 off end # NPK 0x9A33
device pci 0a.0 off end # Crash-log SRAM 0x9A0D
device pci 0d.0 on end # USB xHCI 0x9A13
device pci 0d.1 off end # USB xDCI (OTG) 0x9A15
device pci 0d.2 on end # TBT DMA0 0x9A1B
- device pci 0d.3 off end # TBT DMA1 0x9A1D
+ device pci 0d.3 on end # TBT DMA1 0x9A1D
device pci 0e.0 off end # VMD 0x9A0B

# From PCH EDS(576591)

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I40fda5506de52cfd7cf03093efa737a2c1bcb068
Gerrit-Change-Number: 42442
Gerrit-PatchSet: 1
Gerrit-Owner: Shreesh Chhabbi <shreesh.chhabbi@intel.com>
Gerrit-MessageType: newchange