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5 comments:

• File src/northbridge/intel/sandybridge/chip.h:

  • Patch Set #6, Line 65: * PCIe. Note: This should only be required if your system has Gen3 devices

    line over 80 characters

  • Patch Set #6, Line 114: u8 mode : 2; // 0: Disable, 1: Enable, 2: Auto, 3: Smart Auto

    line over 80 characters

  • Patch Set #6, Line 115: u8 hs_port_switch_mask : 4; // 4 bit mask, 1: switchable, 0: not switchable

    line over 80 characters

  • Patch Set #6, Line 116: u8 preboot_support : 1; // 0: No xHCI preOS driver, 1: xHCI preOS driver

    line over 80 characters

• File src/northbridge/intel/sandybridge/raminit_mrc.c:

  • Patch Set #6, Line 314: switch (cfg->max_mem_clock_mhz) {

    switch and case should be at the same indent

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