Nico Huber submitted this change.
soc/intel/broadwell/pch/sata.c: Add missing SATA init steps
WildcatPoint-LP BIOS spec lists them, and are the same for Lynxpoint.
Change-Id: Iba28c1591affafeb37097084c2fa58128974bd00
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47029
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
---
M src/soc/intel/broadwell/pch/sata.c
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/src/soc/intel/broadwell/pch/sata.c b/src/soc/intel/broadwell/pch/sata.c
index edb9830..92d34c3 100644
--- a/src/soc/intel/broadwell/pch/sata.c
+++ b/src/soc/intel/broadwell/pch/sata.c
@@ -54,6 +54,15 @@
/* Setup register 98h */
reg32 = pci_read_config32(dev, 0x98);
+ reg32 |= 1 << 19;
+ reg32 |= 1 << 22;
+ reg32 &= ~(0x3f << 7);
+ reg32 |= 0x04 << 7;
+ reg32 |= 1 << 20;
+ reg32 &= ~(0x03 << 5);
+ reg32 |= 1 << 5;
+ reg32 |= 1 << 18;
+ reg32 |= 1 << 29; /* Enable clock gating */
reg32 &= ~((1 << 31) | (1 << 30));
reg32 |= 1 << 23;
reg32 |= 1 << 24; /* Enable MPHY Dynamic Power Gating */
@@ -237,10 +246,6 @@
reg32 |= (1 << 31) | (1 << 30) | (1 << 29);
pci_write_config32(dev, 0x300, reg32);
- reg32 = pci_read_config32(dev, 0x98);
- reg32 |= 1 << 29;
- pci_write_config32(dev, 0x98, reg32);
-
/* Register Lock */
reg32 = pci_read_config32(dev, 0x9c);
reg32 |= (1 << 31);
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