4 comments:
Patch Set #4, Line 12: Drive OEB 7:GPP_A7 and OEB 6:GPP_E5 low
Why are these being driven low? Are these the CLK pins?
File src/mainboard/intel/adlrvp/devicetree.cb:
Patch Set #4, Line 54: free running CLK
Just for my education: What is a free running CLK?
File src/mainboard/intel/adlrvp/gpio.c:
Patch Set #4, Line 76: PAD_CFG_GPO
Shouldn't this be NF?
Patch Set #4, Line 78: PAD_CFG_GPO
Same here.
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