[coreboot-gerrit] [S] Change in coreboot[main]: mb/siemens/mc_ehl5: Rename SDIO converge layer register

[Mario Scheithauer (Code Review)]

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85313?usp=email )

Change subject: mb/siemens/mc_ehl5: Rename SDIO converge layer register
......................................................................

mb/siemens/mc_ehl5: Rename SDIO converge layer register

As the registers for SD-Card and eMMC are identical, the names of the
register defines should also be kept more general. Therefore change the
defines from 'SD_' to 'MMC_'.

Change-Id: I2e0839a00f1b097f92f4f7774d973196d2d0e9a3
Signed-off-by: Mario Scheithauer 
---
M src/mainboard/siemens/mc_ehl/variants/mc_ehl5/mainboard.c
1 file changed, 11 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/85313/1

diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/mainboard.c b/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/mainboard.c
index 1121399..a1ce64a 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/mainboard.c
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/mainboard.c
@@ -10,12 +10,12 @@

#define HOSTCTRL2		0x3E
 #define  HOSTCTRL2_PRESET	(1 << 15)
-#define SD_CAP_BYP		0x810
-#define  SD_CAP_BYP_EN		0x5A
-#define SD_CAP_BYP_REG1		0x814
-#define  SD_CAP_BYP_SDR50	(1 << 13)
-#define  SD_CAP_BYP_SDR104	(1 << 14)
-#define  SD_CAP_BYP_DDR50	(1 << 15)
+#define MMC_CAP_BYP		0x810
+#define  MMC_CAP_BYP_EN		0x5A
+#define MMC_CAP_BYP_REG1	0x814
+#define  MMC_CAP_BYP_SDR50	(1 << 13)
+#define  MMC_CAP_BYP_SDR104	(1 << 14)
+#define  MMC_CAP_BYP_DDR50	(1 << 15)

void variant_mainboard_final(void)
 {
@@ -39,12 +39,12 @@
    	struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0);
    	if (!res)
    		return;
-		write32(res2mmio(res, SD_CAP_BYP, 0), SD_CAP_BYP_EN);
-		reg = read32(res2mmio(res, SD_CAP_BYP_REG1, 0));
+		write32(res2mmio(res, MMC_CAP_BYP, 0), MMC_CAP_BYP_EN);
+		reg = read32(res2mmio(res, MMC_CAP_BYP_REG1, 0));
    	/* Disable SDR104 and SDR50 mode while keeping DDR50 mode enabled. */
-		reg &= ~(SD_CAP_BYP_SDR104 | SD_CAP_BYP_SDR50);
-		reg |= SD_CAP_BYP_DDR50;
-		write32(res2mmio(res, SD_CAP_BYP_REG1, 0), reg);
+		reg &= ~(MMC_CAP_BYP_SDR104 | MMC_CAP_BYP_SDR50);
+		reg |= MMC_CAP_BYP_DDR50;
+		write32(res2mmio(res, MMC_CAP_BYP_REG1, 0), reg);

/* Use preset driver strength from preset value registers. */
    	reg16 = read16(res2mmio(res, HOSTCTRL2, 0));