Angel Pons submitted this change.

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Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved
mb/intel/kblrvp: Factor out `HeciEnabled`

RVP8 does not set it, and the other variants set it to zero. So, factor
it out.

Tested with BUILD_TIMELESS=1, all four variants do not change.

Change-Id: I67c958af2dc955d07b895dc93fbe2232dbd48d34
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43908
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
M src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb
M src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb
M src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb
4 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
index 0b1ba1d..580f5b0 100644
--- a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
@@ -23,6 +23,7 @@
register "dptf_enable" = "1"

# FSP Configuration
+ register "HeciEnabled" = "0"
register "ScsEmmcHs400Enabled" = "1"
register "ScsSdCardEnabled" = "2"
register "SkipExtGfxScan" = "1"
diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb
index 9c9a2e7..4c2225a 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb
@@ -9,7 +9,6 @@
# FSP Configuration
register "DspEnable" = "1"
register "IoBufferOwnership" = "0"
- register "HeciEnabled" = "0"
register "PmTimerDisabled" = "1"
register "Cio2Enable" = "1"
register "SaImguEnable" = "1"
diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb
index 26be7dd..11f9c01 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb
@@ -13,7 +13,6 @@
register "gen2_dec" = "0x000c0201"

# FSP Configuration
- register "HeciEnabled" = "0"
register "PmTimerDisabled" = "1"

# VR Settings Configuration for 4 Domains
diff --git a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb
index 18d764b..25dc49e 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb
@@ -7,7 +7,6 @@
# FSP Configuration
register "ScsEmmcHs400Enabled" = "0"
register "ScsSdCardEnabled" = "0"
- register "HeciEnabled" = "0"
register "PmTimerDisabled" = "0"

register "serirq_mode" = "SERIRQ_CONTINUOUS"

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I67c958af2dc955d07b895dc93fbe2232dbd48d34
Gerrit-Change-Number: 43908
Gerrit-PatchSet: 7
Gerrit-Owner: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik@intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: merged