Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Tim Chu.
Patrick Rudolph has uploaded this change for review.
soc/intel/xeon_sp: Attach more stacks
Attach UBOX stacks as well and thus rename the function to
attack_stacks. In order to use PCI drivers for UBOX devices,
locating UBOX devices by vendor and device IDs and replacing device
access by specifying S:B:D:F numbers, add a PCI domain for the UBOX
stacks and let the PCI enumerator index all devices.
Since there are no PCI BARs on the UBOX bus the PCI locator doesn't
have to assign resources on those buses.
Once all PCI devices on the UBOX stack can be located without knowing
their UBOX bus number and PCI segment the Xeon-SP code can fully
enable the multi PCI segment group support.
Test: ibm/sbp1 (4S) is able to find all PCU devices by PCI ID.
Change-Id: I8f9d52dd117364a42de1c73d39cc86dafeaf2678
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
M src/soc/intel/xeon_sp/chip_common.c
M src/soc/intel/xeon_sp/cpx/chip.c
M src/soc/intel/xeon_sp/include/soc/chip_common.h
M src/soc/intel/xeon_sp/skx/chip.c
M src/soc/intel/xeon_sp/spr/chip.c
5 files changed, 50 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/80091/1
diff --git a/src/soc/intel/xeon_sp/chip_common.c b/src/soc/intel/xeon_sp/chip_common.c
index 0411a03..cf488c4 100644
--- a/src/soc/intel/xeon_sp/chip_common.c
+++ b/src/soc/intel/xeon_sp/chip_common.c
@@ -97,9 +97,27 @@
.scan_bus = iio_pci_domain_scan_bus,
};
-/* Attach IIO stack as domains */
-void attach_iio_stacks(struct device *dev)
+static void ubox_pci_domain_scan_bus(struct device *dev)
{
+ for (struct bus *link = dev->link_list; link; link = link->next)
+ pci_scan_bus(link, PCI_DEVFN(0, 0), 0xff);
+}
+
+/*
+ * Used by UBOX stacks. Those contain 1 PCI host bridges,
+ * all the bus numbers on the stack can be used for this bridge.
+ */
+static struct device_operations ubox_pcie_domain_ops = {
+ .read_resources = noop_read_resources,
+ .set_resources = noop_set_resources,
+ .scan_bus = ubox_pci_domain_scan_bus,
+};
+
+/* Attach stack as domains */
+void attach_stacks(struct device *dev)
+{
+ struct device_path path;
+ struct device *iio_domain;
const IIO_UDS *hob = get_iio_uds();
if (!hob)
return;
@@ -110,22 +128,35 @@
continue;
const STACK_RES *ri = &hob->PlatformData.IIO_resource[s].StackRes[x];
- if (!stack_needs_resource_alloc(ri))
+ printk(BIOS_ERR, "Attach socket: %d, stack %d: personality: %d busses %x-%x\n", s, x, ri->Personality, ri->BusBase, ri->BusLimit);
+
+ if (ri->Personality >= TYPE_RESERVED)
continue;
- if (!is_pcie_iio_stack_res(ri)) {
- if (CONFIG(HAVE_IOAT_DOMAINS))
- soc_create_ioat_domains(dev->bus, ri);
- continue;
- }
+ if (is_pcie_iio_stack_res(ri) || ri->Personality == TYPE_UBOX) {
+ path.type = DEVICE_PATH_DOMAIN;
+ path.domain.domain = s * MAX_LOGIC_IIO_STACK + x;
+ iio_domain = alloc_dev(dev->bus, &path);
+ if (iio_domain == NULL)
+ die("%s: out of memory.\n", __func__);
- struct device_path path;
- path.type = DEVICE_PATH_DOMAIN;
- path.domain.domain = s * MAX_LOGIC_IIO_STACK + x;
- struct device *iio_domain = alloc_dev(dev->bus, &path);
- if (iio_domain == NULL)
- die("%s: out of memory.\n", __func__);
- iio_domain->ops = &iio_pcie_domain_ops;
+ if (is_pcie_iio_stack_res(ri)) {
+ iio_domain->ops = &iio_pcie_domain_ops;
+ } else {
+ int i;
+ add_more_links(iio_domain, ri->BusLimit - ri->BusBase + 1);
+
+ i = ri->BusBase;
+ for (struct bus *link = iio_domain->link_list; link; link = link->next, i++) {
+ link->secondary = i;
+ link->subordinate = link->secondary;
+ link->max_subordinate = link->secondary;
+ }
+
+ iio_domain->ops = &ubox_pcie_domain_ops;
+ }
+ } else if (stack_needs_resource_alloc(ri) && CONFIG(HAVE_IOAT_DOMAINS))
+ soc_create_ioat_domains(dev->bus, ri);
}
}
}
diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c
index 39a7eba..e602ad7 100644
--- a/src/soc/intel/xeon_sp/cpx/chip.c
+++ b/src/soc/intel/xeon_sp/cpx/chip.c
@@ -61,7 +61,7 @@
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_DOMAIN) {
dev->ops = &pci_domain_ops;
- attach_iio_stacks(dev);
+ attach_stacks(dev);
} else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
dev->ops = &cpu_bus_ops;
} else if (dev->path.type == DEVICE_PATH_GPIO) {
diff --git a/src/soc/intel/xeon_sp/include/soc/chip_common.h b/src/soc/intel/xeon_sp/include/soc/chip_common.h
index ac8ba9e..dcfb0a0 100644
--- a/src/soc/intel/xeon_sp/include/soc/chip_common.h
+++ b/src/soc/intel/xeon_sp/include/soc/chip_common.h
@@ -7,7 +7,7 @@
void iio_pci_domain_read_resources(struct device *dev);
void iio_pci_domain_scan_bus(struct device *dev);
-void attach_iio_stacks(struct device *dev);
+void attach_stacks(struct device *dev);
void soc_create_ioat_domains(struct bus *bus, const STACK_RES *sr);
diff --git a/src/soc/intel/xeon_sp/skx/chip.c b/src/soc/intel/xeon_sp/skx/chip.c
index b468842..0b0f365 100644
--- a/src/soc/intel/xeon_sp/skx/chip.c
+++ b/src/soc/intel/xeon_sp/skx/chip.c
@@ -47,7 +47,7 @@
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_DOMAIN) {
dev->ops = &pci_domain_ops;
- attach_iio_stacks(dev);
+ attach_stacks(dev);
} else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
dev->ops = &cpu_bus_ops;
} else if (dev->path.type == DEVICE_PATH_GPIO) {
diff --git a/src/soc/intel/xeon_sp/spr/chip.c b/src/soc/intel/xeon_sp/spr/chip.c
index 3b3c65e..3c3417e 100644
--- a/src/soc/intel/xeon_sp/spr/chip.c
+++ b/src/soc/intel/xeon_sp/spr/chip.c
@@ -72,7 +72,7 @@
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_DOMAIN) {
dev->ops = &pci_domain_ops;
- attach_iio_stacks(dev);
+ attach_stacks(dev);
} else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
dev->ops = &cpu_bus_ops;
} else if (dev->path.type == DEVICE_PATH_GPIO) {
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