Attention is currently required from: Furquan Shaikh, Kane Chen, Karthik Ramasubramanian.
Kane Chen uploaded patch set #5 to this change.
soc/intel/{adl,tgl,jsl}: Add smihandler_soc_disable_busmaster
If a power button SMI is triggered between where it is currently
enabled and before FSP-S exits, when the SMI handler disables
bus mastering for all devices, it inadvertently also disables
the PMC's I/O decoding, so the register write to actually go into
S5 does not succeed, and the system hangs.
This can be solved by skipping the PMC when disabling bus
mastering in the SMI handler, for which a callback,
smihandler_soc_disable_busmaster is provided.
BUG=b:186194102, b:186815114
Change-Id: I1cf5cf91ebad4a49df6679e01fc88ff60c81526c
Signed-off-by: Kane Chen <kane.chen@intel.corp-partner.google.com>
---
M src/soc/intel/alderlake/smihandler.c
M src/soc/intel/jasperlake/smihandler.c
M src/soc/intel/tigerlake/smihandler.c
3 files changed, 21 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/52873/5
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