Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31284 )
Change subject: soc/intel/cannonlake: Add required FSP UPD changes for CML
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Patch Set 10:
(2 comments)
https://review.coreboot.org/#/c/31284/9/src/soc/intel/cannonlake/fsp_params....
File src/soc/intel/cannonlake/fsp_params.c:
https://review.coreboot.org/#/c/31284/9/src/soc/intel/cannonlake/fsp_params....
PS9, Line 38: #if IS_ENABLED(CONFIG_SOC_INTEL_COMETLAKE)
we can take 2 steps path. […]
Done
https://review.coreboot.org/#/c/31284/9/src/soc/intel/cannonlake/include/soc...
File src/soc/intel/cannonlake/include/soc/serialio.h:
https://review.coreboot.org/#/c/31284/9/src/soc/intel/cannonlake/include/soc...
PS9, Line 20: typedef enum {
: PchSerialIoDisabled,
: PchSerialIoPci,
: PchSerialIoAcpi,
: PchSerialIoHidden,
: #if IS_ENABLED(CONFIG_SOC_INTEL_COMETLAKE)
: PchSerialIoSkipInit
: #endif
: } PCH_SERIAL_IO_MODE;
Note above is just a proposal that I'm working internally to see if we can implement the same to red […]
Done
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Gerrit-Project: coreboot
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