Brandon Breitenstein has uploaded this change for review.

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mb/intel/tglrvp: Enable PCIEXP_HOTPLUG for TCSS TBT/USB4

This change enables PCIEXP_HOTPLUG to support resource allocation for
TCSS TBT/USB4.

BUG=b:149186922

Change-Id: Id3066204c8a780ade251c7be4052a60a861e43db
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
---
M src/mainboard/intel/tglrvp/Kconfig
1 file changed, 13 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/41543/1

diff --git a/src/mainboard/intel/tglrvp/Kconfig b/src/mainboard/intel/tglrvp/Kconfig
index d60918f..edbd486 100644
--- a/src/mainboard/intel/tglrvp/Kconfig
+++ b/src/mainboard/intel/tglrvp/Kconfig
@@ -15,6 +15,7 @@
 	select SOC_INTEL_TIGERLAKE
 	select INTEL_LPSS_UART_FOR_CONSOLE
 	select DRIVERS_INTEL_ISH
+	select PCIEXP_HOTPLUG
 
 config CHROMEOS
 	bool
@@ -49,6 +50,18 @@
 	int
 	default 8
 
+config PCIEXP_HOTPLUG_BUSES
+	int
+	default 42
+
+config PCIEXP_HOTPLUG_MEM
+	hex
+	default 0xc200000 # 194 MiB
+
+config PCIEXP_HOTPLUG_PREFETCH_MEM
+	hex
+	default 0x1c00000 # 448 MiB
+
 config DEVICETREE
 	string
 	default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"

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