6 comments:
Patch Set #40, Line 28: - Display (with libgfxinit)
Would be good to test
File src/mainboard/acer/aspire_vn7_572g/acpi/ec.asl:
Patch Set #40, Line 110: // ^^^GFX0.GLID (KLID)
?
File src/mainboard/acer/aspire_vn7_572g/acpi/mainboard.asl:
Patch Set #40, Line 42: // If (CondRefOf (\_SB.TPM.PTS))
?
File src/mainboard/acer/aspire_vn7_572g/devicetree.cb:
Patch Set #40, Line 71: register "SaGv" = "3"
There should be an enum for SaGv values (not sure if Skylake has it)
File src/mainboard/acer/aspire_vn7_572g/dsdt.asl:
Patch Set #40, Line 50: // Chipset specific sleep states
"common" isn't really "chipset specific", so maybe drop the comment?
File src/mainboard/acer/aspire_vn7_572g/hda_verb.c:
Patch Set #40, Line 34: /* Pin Complex (NID 0x12) */
Please remove these comments, they don't provide useful info
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