[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Add required FSP UPD changes for CML

[Maulik V Vaghela (Code Review)]

Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31284 )

Change subject: soc/intel/cannonlake: Add required FSP UPD changes for CML
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Patch Set 16:

(1 comment)

https://review.coreboot.org/#/c/31284/16/src/soc/intel/cannonlake/fsp_params... 
File src/soc/intel/cannonlake/fsp_params.c:

https://review.coreboot.org/#/c/31284/16/src/soc/intel/cannonlake/fsp_params... 
PS16, Line 58: 		if (config->SerialIoDevMode[dev_offset] <= PchSerialIoSkipInit)
> I'm fine with any solution that either maintains the current behavior […]

Yes Furquan, I think this was concern that some random value might get filled into UPD value. I have done changes as per your suggestion. I'll also capture this into commit message.