Martin Roth (martinroth@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12637
-gerrit
commit d665252687efaa2fda3e8c97ee5c9d974e1fbee5 Author: Martin Roth martinroth@google.com Date: Thu Dec 3 14:27:45 2015 -0700
intel/common/firmware: Add option to configure SPI for EM100
Add a Kconfig option to set the firmware descriptor to allow EM100 use.
Change-Id: If5d7cd6ad671f0328ee5be0b5e660dbc837fcac3 Signed-off-by: Martin Roth martinroth@google.com --- src/southbridge/intel/common/firmware/Kconfig | 6 ++++++ src/southbridge/intel/common/firmware/Makefile.inc | 6 ++++++ 2 files changed, 12 insertions(+)
diff --git a/src/southbridge/intel/common/firmware/Kconfig b/src/southbridge/intel/common/firmware/Kconfig index 316ade4..62b9a31 100644 --- a/src/southbridge/intel/common/firmware/Kconfig +++ b/src/southbridge/intel/common/firmware/Kconfig @@ -34,6 +34,12 @@ config IFD_BIN_PATH default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/descriptor.bin" depends on HAVE_IFD_BIN && !BUILD_WITH_FAKE_IFD
+config EM100 + bool "Configure IFD for EM100 usage" + depends on HAVE_IFD_BIN && !BUILD_WITH_FAKE_IFD + help + Set SPI frequency to 20MHz and disable Dual Output Fast Read Support + config HAVE_ME_BIN bool "Add Intel ME/TXE firmware" depends on HAVE_IFD_BIN diff --git a/src/southbridge/intel/common/firmware/Makefile.inc b/src/southbridge/intel/common/firmware/Makefile.inc index 49a4434..3cf2159 100644 --- a/src/southbridge/intel/common/firmware/Makefile.inc +++ b/src/southbridge/intel/common/firmware/Makefile.inc @@ -71,6 +71,12 @@ else ifneq ($(CONFIG_BUILD_WITH_FAKE_IFD),y) mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre endif
+ifeq ($(CONFIG_EM100),y) + printf " IFDTOOL Setting EM100 mode\n" + $(objutil)/ifdtool/ifdtool -e $(obj)/coreboot.pre + mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre +endif + PHONY+=add_intel_firmware
endif