Shelley Chen merged this change.
mb/google/kohaku: Enable stylus pen device
Enabling stylus pen device and pen_eject event.
- Adding enable_gpio for power sequencing
- Configuring GPP_H4 and GPP_H5 as native function
- Adding PENH device node for pen ejection event
BUG=b:137326841
BRANCH=none
TEST=Verified pen input operation and pen_eject event (pop-up and wake
from s0ix on pen ejection)
Change-Id: Ic252a1f90c0fc6cb9b1e426d75a8b503824681f3
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.com>
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34581
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
---
M src/mainboard/google/hatch/variants/kohaku/gpio.c
M src/mainboard/google/hatch/variants/kohaku/overridetree.cb
2 files changed, 24 insertions(+), 12 deletions(-)
diff --git a/src/mainboard/google/hatch/variants/kohaku/gpio.c b/src/mainboard/google/hatch/variants/kohaku/gpio.c
index 88c1d7b..d22de04 100644
--- a/src/mainboard/google/hatch/variants/kohaku/gpio.c
+++ b/src/mainboard/google/hatch/variants/kohaku/gpio.c
@@ -24,7 +24,7 @@
/* A6 : SERIRQ ==> NC */
PAD_NC(GPP_A6, NONE),
/* A10 : PEN_RESET_ODL */
- PAD_CFG_GPO(GPP_A10, 0, DEEP),
+ PAD_CFG_GPO(GPP_A10, 1, DEEP),
/* A17 : PIRQA# ==> NC */
PAD_NC(GPP_A17, NONE),
/* A18 : ISH_GP0 ==> NC */
@@ -39,15 +39,9 @@
PAD_NC(GPP_B8, NONE),
/* C1 : SMBDATA: NC */
PAD_NC(GPP_C1, NONE),
- /*
- * C12 : EMR_GARAGE_INT
- * The same signal is routed to both A8 and C12. Currently C12
- * is the interrupt source, and A8 is the wake source.
- * Hoping that GPP_A8 can be used for both interrupt (SCI) and wake
- * (GPIO). Keeping as GPI for now.
- */
- PAD_CFG_GPI_SCI(GPP_C12, NONE, DEEP, EDGE_SINGLE, INVERT),
- /* C15 : EN_PP3300_TSP_DIG_DX */
+ /* C7 : PEN_IRQ_OD_L */
+ PAD_CFG_GPI_APIC(GPP_C7, NONE, PLTRST, LEVEL, INVERT),
+ /* C15 : EN_PP3300_DIG_DX */
PAD_CFG_GPO(GPP_C15, 0, DEEP),
/* C23 : UART2_CTS# ==> NC */
PAD_NC(GPP_C23, NONE),
@@ -69,6 +63,10 @@
PAD_NC(GPP_G5, NONE),
/* G6 : GPP_G6 ==> NC */
PAD_NC(GPP_G6, NONE),
+ /* H4 : PCH_I2C_PEN_SDA */
+ PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
+ /* H5 : PCH_I2C_PEN_SCL */
+ PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
};
const struct pad_config *override_gpio_table(size_t *num)
diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
index b3ae1bc..8a1de84 100644
--- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
@@ -86,12 +86,26 @@
register "generic.hid" = ""WCOM50C1""
register "generic.desc" = ""WCOM Digitizer""
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
- register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A10)"
- register "generic.reset_delay_ms" = "1"
+ register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C15)"
+ # TODO: We can't use GPP_A10 as reset_gpio due to its voltage level,
+ # so we need to reassign it or remove it.
+ #register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A10)"
+ #register "generic.reset_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x1"
device i2c 0x09 on end
end
+ chip drivers/generic/gpio_keys
+ register "name" = ""PENH""
+ register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_A8)"
+ register "key.wake" = "GPE0_DW0_08"
+ register "key.wakeup_event_action" = "EV_ACT_DEASSERTED"
+ register "key.dev_name" = ""EJCT""
+ register "key.linux_code" = "SW_PEN_INSERTED"
+ register "key.linux_input_type" = "EV_SW"
+ register "key.label" = ""pen_eject""
+ device generic 0 on end
+ end
end # I2C #2
device pci 19.0 on
chip drivers/i2c/da7219
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