Christian Walter has uploaded this change for review.
tegra210: Increased size of verstage due to overflow
When imlpementing chagnes in VBOOT, within the build process, tegra210
overflows into the romstage. Reduced the size of Romstage from 104 to
100 and increase the size from verstage from 66 to 70.
Change-Id: Ie00498838a644a6f92881db85833dd0a94b87f53
Signed-off-by: Christian Walter <christian.walter@9elements.com>
---
M src/soc/nvidia/tegra210/include/soc/memlayout.ld
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/34640/1
diff --git a/src/soc/nvidia/tegra210/include/soc/memlayout.ld b/src/soc/nvidia/tegra210/include/soc/memlayout.ld
index 5d7481b..6091dd8 100644
--- a/src/soc/nvidia/tegra210/include/soc/memlayout.ld
+++ b/src/soc/nvidia/tegra210/include/soc/memlayout.ld
@@ -39,8 +39,8 @@
#endif
TIMESTAMP(0x4000D800, 2K)
BOOTBLOCK(0x4000E000, 30K)
- VERSTAGE(0x40015800, 66K)
- ROMSTAGE(0x40026000, 104K)
+ VERSTAGE(0x40015800, 70K)
+ ROMSTAGE(0x40026000, 100K)
SRAM_END(0x40040000)
DRAM_START(0x80000000)
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