^^^ it takes a bit long because I enabled the max debug level + FT232H debug dongle to significantly prolong the boot time (although still couldn't see a coreboot's bootsplash)
Huh.. what on earth is that raminit doing, do you have debugging from AGESA as well enabled?
Here is my current .config - https://pastebin.com/qxGeTgR4 . As you see I don't have any other debugging features enabled, it's just FT232H introduces such a significant delays. I haven't physically attached FT232H despite enabling this feature, so maybe coreboot is trying to detect it for some time before failing.
If we trust the stamps, that's like 100ms the splash would be shown. On 50hz screen that's five frames. Depending of platform I guess, does OPROM control backlight PWM? Assuming that OPROM may also exit before backlight is really lit, you are left with few frames until payload will wipe the framebuffer.
Yes, indeed: OPROM controls the backlight PWM at G505S. I know it because once I tried the "not-initialized" OPROM directly extracted from a proprietary UEFI image and my backlight didn't work (it seems that while booting UEFI initializes many of its' platform-dependent fields to make it useful) so I know that backlight really depends on that OpROM.
So during all my attempts I've been trying to light the screen with a handheld flashlight (with this trick I was able to see the SeaBIOS letters when my backlight was temporarily software-broken because of that "not-initialized OpROM"), but it was still hard to see anything, and if there are just a few frames of bootsplash according to your calculations - it could be really difficult to notice them.
That's the reasoning why coreboot bootsplash is much ado about nothing.
Maybe this coreboot feature could be made more useful if we would add some timeout? Please tell me, what is the easiest way to add the delay to coreboot's code - and I could try it to see if this helps me to see the coreboot bootsplash.
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