Felix Held submitted this change.

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Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved Arthur Heymans: Looks good to me, approved
soc/amd/picasso/reset: remove leftover PCI includes

On Stoneyridge some PCI registers were accessed in this compilation
unit, but on Picasso this is no longer the case.

Change-Id: Ifbf65f9724a14d4847af98930759c865453775b4
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48486
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/soc/amd/picasso/reset.c
1 file changed, 0 insertions(+), 2 deletions(-)

diff --git a/src/soc/amd/picasso/reset.c b/src/soc/amd/picasso/reset.c
index 7a0074c..dea166a 100644
--- a/src/soc/amd/picasso/reset.c
+++ b/src/soc/amd/picasso/reset.c
@@ -3,9 +3,7 @@
#include <arch/io.h>
#include <console/console.h>
#include <reset.h>
-#include <soc/pci_devs.h>
#include <soc/reset.h>
-#include <device/pci_ops.h>
#include <soc/southbridge.h>
#include <amdblocks/acpimmio.h>
#include <amdblocks/reset.h>

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ifbf65f9724a14d4847af98930759c865453775b4
Gerrit-Change-Number: 48486
Gerrit-PatchSet: 4
Gerrit-Owner: Felix Held <felix-coreboot@felixheld.de>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Felix Held <felix-coreboot@felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk@gmail.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd@gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged