Lijian Zhao uploaded patch set #2 to this change.

View Change

mb/intel/coffeelake_rvp: Add whiskeylake rvp board

Add new mainboard variant for whiskeylake rvp, which will include change
to read SPD from SMBUS slave address directly instead of pass bin file
pointer. Also fsp memory upd will use the setting fit the board.

BUG=N/A
TEST=Build and flash, confirm boot up into kernel on whiskeylake rvp
platform.

Change-Id: I4a5e8a9ec76d5e55e55ef9bf968825c17fbe9816
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
---
M src/mainboard/intel/coffeelake_rvp/Kconfig
M src/mainboard/intel/coffeelake_rvp/Kconfig.name
M src/mainboard/intel/coffeelake_rvp/romstage.c
M src/mainboard/intel/coffeelake_rvp/spd/spd_util.c
A src/mainboard/intel/coffeelake_rvp/variants/whl_w/devicetree.cb
A src/mainboard/intel/coffeelake_rvp/variants/whl_w/include/variant/gpio.h
6 files changed, 191 insertions(+), 13 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/27628/2

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I4a5e8a9ec76d5e55e55ef9bf968825c17fbe9816
Gerrit-Change-Number: 27628
Gerrit-PatchSet: 2
Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>