Patrick Georgi submitted this change.

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mb/google/volteer: clang-format mainboard.c

This CL is entirely generated by running the automatic formatter on this
one file.

BUG=None
TEST=abuild -t GOOGLE_VOLTEER2 -c max -x

Change-Id: Ibdd8cc2222e7af11c11df963b088ca2db07a3214
Signed-off-by: Jes Bodi Klinke <jbk@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47048
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
M src/mainboard/google/volteer/mainboard.c
1 file changed, 7 insertions(+), 10 deletions(-)

diff --git a/src/mainboard/google/volteer/mainboard.c b/src/mainboard/google/volteer/mainboard.c
index 016572a..acba972 100644
--- a/src/mainboard/google/volteer/mainboard.c
+++ b/src/mainboard/google/volteer/mainboard.c
@@ -102,8 +102,7 @@
 		return;
 	}
 
-	if (CONFIG(MAINBOARD_HAS_SPI_TPM_CR50) &&
-	    cr50_is_long_interrupt_pulse_enabled()) {
+	if (CONFIG(MAINBOARD_HAS_SPI_TPM_CR50) && cr50_is_long_interrupt_pulse_enabled()) {
 		printk(BIOS_INFO, "Enabling S0i3.4\n");
 	} else {
 		/*
@@ -126,8 +125,7 @@
 	base_pads = variant_base_gpio_table(&base_num);
 	override_pads = variant_override_gpio_table(&override_num);
 
-	gpio_configure_pads_with_override(base_pads, base_num,
-		override_pads, override_num);
+	gpio_configure_pads_with_override(base_pads, base_num, override_pads, override_num);
 }
 
 void mainboard_silicon_init_params(FSP_S_CONFIG *params)
@@ -135,14 +133,13 @@
 	bool has_usb4;
 
 	/* If device doesn't have USB4 hardware, disable tbt */
-	has_usb4 = (fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN2)) ||
-	    fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN3)));
+	has_usb4 = (fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN2))
+		    || fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN3)));
 
 	if (!has_usb4)
-		memset(params->ITbtPcieRootPortEn,
-		       0,
-		       ARRAY_SIZE(params->ITbtPcieRootPortEn) *
-		       sizeof(*params->ITbtPcieRootPortEn));
+		memset(params->ITbtPcieRootPortEn, 0,
+		       ARRAY_SIZE(params->ITbtPcieRootPortEn)
+			       * sizeof(*params->ITbtPcieRootPortEn));
 }
 
 struct chip_operations mainboard_ops = {

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