Arthur Heymans has uploaded this change for review.

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mb/intel/dg43gt: Expose some SIO devices via ACPI

Change-Id: I0df578b98c5b346caa6f6df5fdabda28788e6b66
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/mainboard/intel/dg43gt/acpi/superio.asl
1 file changed, 27 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/27298/1

diff --git a/src/mainboard/intel/dg43gt/acpi/superio.asl b/src/mainboard/intel/dg43gt/acpi/superio.asl
index 2997587..2fc3d8e 100644
--- a/src/mainboard/intel/dg43gt/acpi/superio.asl
+++ b/src/mainboard/intel/dg43gt/acpi/superio.asl
@@ -1 +1,27 @@
-/* dummy */
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#undef SUPERIO_DEV
+#undef SUPERIO_PNP_BASE
+#undef W83627DHG_SHOW_UARTA
+#undef W83627DHG_SHOW_UARTB
+#undef W83627DHG_SHOW_KBC
+#undef W83627DHG_SHOW_PS2M
+#undef W83627DHG_SHOW_HWMON
+#define SUPERIO_DEV		SIO0
+#define SUPERIO_PNP_BASE	0x2e
+#define W83627DHG_SHOW_UARTA
+#define W83627DHG_SHOW_KBC
+#define W83627DHG_SHOW_PS2M
+#define W83627DHG_SHOW_HWMON
+#include <superio/winbond/w83627dhg/acpi/superio.asl>

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