Michael Niewöhner uploaded patch set #5 to this change.

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soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX

CB:41106 revealed that mb/intel/cedarisland already sets FSP-S UPD (see
CB:40735) while the required includes are still missing in CPX. Buildbot
did not fail because `ramstage.c` never was (implicitly) included.

Fix this problem by making SKX/CPX share a common ramstage header for
now by moving the one from SKX.

Test: Build cedarisland_crb

Change-Id: I9cd25edd167ec71ee98c7ffa4fa6f95ca73a75e9
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
---
D src/soc/intel/xeon_sp/cpx/include/soc/ramstage.h
R src/soc/intel/xeon_sp/include/soc/ramstage.h
2 files changed, 0 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/41116/5

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