Martin Roth has uploaded this change for review.
soc/amd/picasso: Change SOC_AMD_STONEY* to SOC_AMD_PICASSO
TEST=None
BUG=b:130804851
Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: Ie466bc39ed6aa9d2a8651bd9290090b83cd97d74
---
M src/soc/amd/picasso/Kconfig
M src/soc/amd/picasso/makefile.inc
2 files changed, 6 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/32410/1
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 29ab149..feaabac 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -13,17 +13,12 @@
## GNU General Public License for more details.
##
-config SOC_AMD_STONEYRIDGE_FP4
+config SOC_AMD_PICASSO
bool
help
- AMD Stoney Ridge FP4 support
+ AMD Picasso support
-config SOC_AMD_STONEYRIDGE_FT4
- bool
- help
- AMD Stoney Ridge FT4 support
-
-if SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4
+if SOC_AMD_PICASSO
config CPU_SPECIFIC_OPTIONS
def_bool y
@@ -379,4 +374,4 @@
return to S0. Otherwise the system will remain in S5 once power
is restored.
-endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4
+endif # SOC_AMD_PICASSO
diff --git a/src/soc/amd/picasso/makefile.inc b/src/soc/amd/picasso/makefile.inc
index cc8be37..470960b 100644
--- a/src/soc/amd/picasso/makefile.inc
+++ b/src/soc/amd/picasso/makefile.inc
@@ -27,7 +27,7 @@
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#*****************************************************************************
-ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y)
+ifeq ($(CONFIG_SOC_AMD_PICASSO),y)
subdirs-y += ../../../cpu/amd/mtrr/
subdirs-y += ../../../cpu/x86/tsc
@@ -314,4 +314,4 @@
endif # ifeq ($(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW),y)
-endif # ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y)
+endif # ($(CONFIG_SOC_AMD_PICASSO),y)
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