Patch Set 1:

Sorry for the basic question, but: What does this fix?

If this is needed to make something work in the OS, I guess
something at the chip level is accidentally guarded by
SERIAL_CONSOLE? At least the code in drivers/uart/ shouldn't
make any difference regarding the general availability of
the UART.

This is just to set up the UAER even if coreboot doesn't use it.
This also goes along with the following patches to set up the SPCR ACPI table.

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic0942634ab8a9fcafdc1ea099721c127202e9f9a
Gerrit-Change-Number: 33380
Gerrit-PatchSet: 1
Gerrit-Owner: Martin Roth <martinroth@google.com>
Gerrit-Reviewer: Martin Roth <martinroth@google.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph@9elements.com>
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Gerrit-CC: Julius Werner <jwerner@chromium.org>
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