soc/intel/skylake: rework and fix platform detection

This fixes multiple problems by completely reworking platform detection:

The 100 series PCH is reported as "SKL" platform which does support SKL
and KBL and thus leads to confusion. Modify the platforms reported in the
console to be reported as "SKL/KBL <pch name>".

Further, platform detection currently can fail if PCIe root port 1 is
disabled. However, PCIe port swapping, which should work around exactly
this problem in general, depends on platform detection.

This chicken-and-egg problem is solved by relying on the LPC device id
instead of the PCIe port 1 device id, since this is what FSP does
successfully (found out by reversing FSP-S). Required device id bases
and masks got added to the device id list, while resorting some
misplaced ones.

Also, the platform detection now has been implemented in a more generic
way that will make it possible to move this (and coreboot-native PCIe
root port swapping, which is already being worked on) to the common
section and make it available for other platforms.

Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: Ida60f619308388adc180a5652908e5a947c17c0f
---
M src/include/device/pci_ids.h
M src/soc/intel/skylake/chip_fsp20.c
2 files changed, 66 insertions(+), 34 deletions(-)