HAOUAS Elyes (ehaouas@noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17197
-gerrit
commit d5fad9ebb7b38eb5670c35aed8ff2a5ad5bc4ed9 Author: Elyes HAOUAS ehaouas@noos.fr Date: Mon Oct 31 10:49:33 2016 +0100
nb/i945/raminit.c: Correct C*R0B00DQST values for i945GC
It needs test. Values based on vendor bios.
Change-Id: I2160f0ac73776b20e2cc1ff5bf77ebe98d2c2672 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- src/northbridge/intel/i945/raminit.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index dbd5d42..e1a99c4 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -1234,9 +1234,15 @@ static void sdram_program_dll_timings(struct sys_info *sysinfo)
/* We drive both channels with the same speed */ switch (sysinfo->memory_frequency) { - case 400: chan0dll = 0x26262626; chan1dll = 0x26262626; break; /* 400MHz */ - case 533: chan0dll = 0x22222222; chan1dll = 0x22222222; break; /* 533MHz */ - case 667: chan0dll = 0x11111111; chan1dll = 0x11111111; break; /* 667MHz */ + if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM)) { + case 400: chan0dll = 0x26262626; chan1dll = 0x26262626; break; /* 400MHz */ + case 533: chan0dll = 0x22222222; chan1dll = 0x22222222; break; /* 533MHz */ + case 667: chan0dll = 0x11111111; chan1dll = 0x11111111; break; /* 667MHz */ + } else if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC)) { + case 400: chan0dll = 0x26262626; chan1dll = 0x26262626; break; /* 400MHz */ + case 533: chan0dll = 0x24242424; chan1dll = 0x24242424; break; /* 533MHz */ + case 667: chan0dll = 0x25252525; chan1dll = 0x25252525; break; /* 667MHz */ + } }
for (i = 0; i < 4; i++) {