Attention is currently required from: Nick Vaccaro.

Tim Wawrzynczak uploaded patch set #19 to this change.

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soc/intel/tigerlake: Enable support for common IRQ block

Since GPIO IO-APIC IRQs are fixed in hardware (RO registers), this patch
allows tigerlake boards to dynamically assign PCI IRQs. This means not
relying on FSP defaults, which eliminates the problem of PCI IRQs
interfering with GPIO IRQs routed to the same IRQ, when both have
selected IO-APIC routing.

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Ieb241f2b91af52a7e2d0efe997d35732882ac463
---
M src/soc/intel/tigerlake/Kconfig
D src/soc/intel/tigerlake/acpi/pci_irqs.asl
M src/soc/intel/tigerlake/acpi/southbridge.asl
M src/soc/intel/tigerlake/chip.c
M src/soc/intel/tigerlake/fsp_params.c
5 files changed, 151 insertions(+), 164 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/49409/19

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