Arthur Heymans has uploaded this change for review.

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nb/intel/pineview: Fix clearing memory

The regions TSEG, GSM, GMS should not be marked as cacheable
resources.

Change-Id: I083b096cf3ed250bca722674abe9feffdb2436d1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/northbridge/intel/pineview/northbridge.c
1 file changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/47174/1

diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c
index a04b62b..e98c16b 100644
--- a/src/northbridge/intel/pineview/northbridge.c
+++ b/src/northbridge/intel/pineview/northbridge.c
@@ -98,9 +98,9 @@
 	/* Report the memory regions */
 	ram_resource(dev, index++, 0, 640);
 	ram_resource(dev, index++, 768, tomk - 768);
-	reserved_ram_resource(dev, index++, tseg_basek, tseg_sizek);
-	reserved_ram_resource(dev, index++, gtt_basek,  gsm_sizek);
-	reserved_ram_resource(dev, index++, igd_basek,  gms_sizek);
+	mmio_resource(dev, index++, tseg_basek, tseg_sizek);
+	mmio_resource(dev, index++, gtt_basek,  gsm_sizek);
+	mmio_resource(dev, index++, igd_basek,  gms_sizek);
 	reserved_ram_resource(dev, index++, cbmem_topk, delta_cbmem);
 
 	/*

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